参数资料
型号: MAX1544ETL+
厂商: Maxim Integrated Products
文件页数: 25/42页
文件大小: 0K
描述: IC QUICK-PWM DUAL-PHASE 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
系列: Quick-PWM™
应用: 控制器,AMD Hammer
输入电压: 2 V ~ 28 V
输出数: 1
输出电压: 0.68 V ~ 1.55 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 管件
Dual-Phase, Quick-PWM Controller for
AMD Hammer CPU Core Power Supplies
Table 5. Suspend Mode DAC Codes
LOWER SUSPEND CODES
OUTPUT
UPPER SUSPEND CODES
OUTPUT
SUS*
S1
S0
VOLTAGE
SUS*
S1
S0
VOLTAGE
(V)
(V)
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
High
GND
GND
GND
GND
REF
REF
REF
REF
OPEN
OPEN
OPEN
OPEN
V CC
V CC
V CC
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
0.675
0.700
0.725
0.750
0.775
0.800
0.825
0.850
0.875
0.900
0.925
0.950
0.975
1.000
1.025
1.050
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
REF
GND
GND
GND
GND
REF
REF
REF
REF
OPEN
OPEN
OPEN
OPEN
V CC
V CC
V CC
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
GND
REF
OPEN
V CC
1.075
1.100
1.125
1.150
1.175
1.200
1.225
1.250
1.275
1.300
1.325
1.350
1.375
1.400
1.425
1.450
* Connect the three-level SUS input to a 2.7V or greater supply (3.3V or V CC ) for an input logic level high.
where I CC is provided in the Electrical Characteristics ,
f SW is the switching frequency, and Q G(LOW) and
Q G(HIGH) are the MOSFET data sheet ’ s total gate-charge
specification limits at V GS = 5V.
V+ and V DD can be tied together if the input power
source is a fixed 4.5V to 5.5V supply. If the 5V bias
supply is powered up prior to the battery supply, the
enable signal ( SHDN going from low to high) must be
delayed until the battery voltage is present to ensure
startup.
Free-Running, Constant-On-Time PWM
Controller with Input Feed Forward
The Quick-PWM control architecture is a pseudofixed-
frequency, constant-on-time, current-mode regulator with
input voltage feed forward (Figure 5). This architecture
relies on the output filter capacitor ’ s ESR to act as the
current-sense resistor, so the output ripple voltage pro-
vides the PWM ramp signal. The control algorithm is sim-
ple: the high-side switch on-time is determined solely by
a one-shot whose period is inversely proportional to input
voltage, and directly proportional to output voltage or the
difference between the main and secondary inductor
currents (see the On-Time One-Shot ( TON ) section).
Another one-shot sets a minimum off-time. The on-time
one-shot triggers when the error comparator goes low,
the inductor current of the selected phase is below the
valley current-limit threshold, and the minimum off-time
one-shot times out. The controller maintains 180 ° out-of-
phase operation by alternately triggering the main and
secondary phases after the error comparator drops
below the output voltage set point.
On-Time One-Shot (TON)
The core of each phase contains a fast, low-jitter,
adjustable one-shot that sets the high-side MOSFETs
on-time. The one-shot for the main phase varies the on-
time in response to the input and feedback voltages.
The main high-side switch on-time is inversely propor-
tional to the input voltage as measured by the V+ input,
and proportional to the feedback voltage (V FB ):
t ON ( MAIN ) = K ( V FB + 0 . 075 V )
V IN
where K is set by the TON pin-strap connection (Table 6)
and 0.075V is an approximation to accommodate the
expected drop across the low-side MOSFET switch.
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