- 您现在的位置：买卖IC网 > PDF目录1839 > MAX1716EEG+ (Maxim Integrated Products)IC REG CTRLR BUCK PWM CM 24-QSOP PDF资料下载
参数资料
| 型号： | MAX1716EEG+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 19/33页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 24-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 550kHz |
| 占空比： | 100% |
| 电源电压： | 2 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页
High-Speed, Adjustable, Synchronous Step-Down
Controllers with Integrated Voltage Positioning
drain to the gate of the low-side synchronous-rectifier
+5V
V BATT
MOSFET. However, for high-current applications, some
combinations of high- and low-side FETs may cause
excessive gate-drain coupling, leading to poor efficien-
MAX1716
MAX1854
MAX1855
BST
DH
LX
5 ? TYP
cy, EMI, and shoot-through currents. This is often reme-
died by adding a resistor in series with BST, which
increases the turn-on time of the high-side FET without
degrading the turn-off time (Figure 5).
DAC Converter (D0–D4)
The digital-to-analog converter (DAC) programs the
output voltage. It receives a preset digital code from
the VID inputs (D0 – D4), which contain weak internal
pullups to eliminate external resistors. They can also be
driven by digital logic, general-purpose I/O, or an exter-
nal multiplexer. The available DAC codes and resulting
Figure 5. Reducing the Switching-Node Rise Time
V CC . The logic threshold for switchover to the 120mV
default value is approximately V CC - 1V.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors don ’ t corrupt the cur-
rent-sense signals seen by CS and PGND. The IC must
be mounted close to the current-sense resistor with
short, direct traces making a Kelvin sense connection.
MOSFET Gate Drivers (DH and DL)
The DH and DL drivers are optimized for driving mod-
erate-sized, high-side and larger, low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
V IN - V OUT differential exists. An adaptive dead-time
circuit monitors the DL output and prevents the high-
side FET from turning on until DL is fully off. There must
be a low-resistance, low-inductance path from the DL
driver to the MOSFET gate in order for the adaptive
dead-time circuit to work properly. Otherwise, the
sense circuitry in the MAX1716/MAX1854/MAX1855 will
interpret the MOSFET gate as “ off ” while there is actual-
ly still charge left on the gate. Use very short, wide
traces measuring 10 to 20 squares (50 to 100 mils wide
if the MOSFET is 1 inch from the device). The dead
time at the other edge (DH turning off) is determined by
a fixed 35ns internal delay.
The internal pulldown transistor that drives DL low is
robust, with a 0.5 ? (typ) on-resistance. This helps pre-
vent DL from being pulled up during the fast rise time
of the LX node, due to capacitive coupling from the
output voltages (Table 5) are compatible with Intel ’ s
mobile Pentium III ? specifications.
D0-D4 can be changed while the regulator is active, ini-
tiating a transition to a new output voltage level.
Change D0 – D4 synchronously to avoid errors during a
V OUT transition. If the skew between bits exceeds 1μs,
incorrect DAC outputs may cause a partial transition to
the wrong voltage level, followed by the intended tran-
sition to the correct voltage level, lengthening the over-
all transition time.
When changing the MAX1855 DAC code while pow-
ered up, the undervoltage protection feature can be
activated if the code change increases the output volt-
age by more than 120%. For example, a transition from
any DAC code below 0.8V to 1.75V will activate the
undervoltage protection. In the preceding example,
transitioning from 0.8V to 1.35V and then from 1.35V to
1.75V avoids activating the undervoltage protection
feature.
Shutdown ( S H D N )
Drive SHDN low to force the MAX1716/MAX1854/
MAX1855 into a low-current shutdown state. Shutdown
turns on the low-side MOSFET by forcing the DL gate
driver high, which discharges the output capacitor and
forces the output to ground. Drive or connect SHDN to
V CC for normal operation. A rising edge on SHDN
clears the fault latch.
Power-on Reset
Power-on reset (POR) occurs when V CC rises above
approximately 2V. This resets the fault latch and soft-
start counter, preparing the regulator for operation.
Pentium III is a trademark of Intel Corp.
______________________________________________________________________________________
19
相关PDF资料 |
PDF描述 |
|---|---|
| MAX1717EEG+ | IC REG CTRLR BUCK PWM CM 24-QSOP |
| MAX1720EUT | IC REG SWITCHD CAP INV ADJ 6TSOP |
| MAX1721EUT-T | IC REG SWITCHED CAP INV SOT23-6 |
| MAX1724EZK50-T | IC REG BST SYNC 5V .15A TSOT23-5 |
| MAX1725EUK+T | IC REG LDO ADJ 20MA SOT23-5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1716EEG+ | 功能描述:DC/DC 开关控制器 Adj Synchronous Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1716EEG+T | 功能描述:DC/DC 开关控制器 Adj Synchronous Step-Down RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1716EEG-T | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX17175ETG+ | 制造商:Maxim Integrated Products 功能描述:BOOST REG W/INTEGRATED CHARGE PUMPS SWITCH CONTROL & HIGH-CU - Rail/Tube |
| MAX1717BEEG | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
发布紧急采购，3分钟左右您将得到回复。