参数资料
型号: MAX1716EEG+
厂商: Maxim Integrated Products
文件页数: 27/33页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 24-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
PWM 型: 电流模式
输出数: 1
频率 - 最大: 550kHz
占空比: 100%
电源电压: 2 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
包装: 管件
High-Speed, Adjustable, Synchronous Step-Down
Controllers with Integrated Voltage Positioning
R LOAD = V OUT / I OUT
3) Calculate the output current that would exist for
each R LOAD data point in a nonpositioned
application:
I NP = V NP / R LOAD
where V NP = 1.6V (in this example).
4) Calculate effective efficiency as:
Effective efficiency = (V NP × I NP ) / (V IN × I IN ) =
calculated nonpositioned power output divided by
the measured voltage-positioned power input.
5) Plot the efficiency data point at the nonpositioned
current, I NP .
The effective efficiency of voltage-positioned circuits is
shown in the Typical Operating Characteristics .
Dropout Performance
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
500ns (max) minimum off-time one-shot. For best
dropout performance, use the slower (200kHz) on-time
settings. When working with low input voltages, the
duty-factor limit must be calculated using worst-case
values for on- and off-times. Manufacturing tolerances
and internal propagation delays introduce an error to
the TON K-factor. This error is greater at higher fre-
quencies (Table 3). Also, keep in mind that transient
response performance of buck regulators operated
close to dropout is poor, and bulk output capacitance
must often be added (see the V SAG equation in the
Design Procedure section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time ( ? I DOWN )
as much as it ramps up during the on-time ( ? I UP ). The
ratio h = ? I UP / ? I DOWN is an indicator of ability to slew
the inductor current higher in response to increased
load and must always be >1. As h approaches 1, the
absolute minimum dropout point, the inductor current
cannot increase as much during each switching cycle,
and V SAG greatly increases unless additional output
capacitance is used.
A reasonable minimum value for h is 1.5, but adjusting
this up or down allows trade-offs between V SAG , output
capacitance, and minimum operating voltage. For a
given value of h, the minimum operating voltage can be
calculated as:
V OUT + V DROP1
where V DROP1 and V DROP2 are the parasitic voltage
drops in the discharge and charge paths (see On-Time
One-Sho t), t OFF(MIN) is from the Electrical
Characteristics table, and K is taken from Table 3. The
absolute minimum input voltage is calculated with h = 1.
If the calculated V IN(MIN) is greater than the required
minimum input voltage, then reduce the operating fre-
quency or add output capacitance to obtain an accept-
able V SAG . If operation near dropout is anticipated,
calculate V SAG to be sure of adequate transient re-
sponse.
Dropout Design Example:
V OUT = 1.6V
? SW = 550kHz
K = 1.8μs, worst-case K = 1.58μs
t OFF(MIN) = 500ns
V DROP1 = V DROP2 = 100mV
h = 1.5
V IN(MIN) = [(1.6V + 0.1V) / (1 - (0.5μs × 1.5 / 1.58μs))] +
0.1V - 0.1V = 3.2V
Calculating again with h = 1 gives the absolute limit of
dropout:
V IN(MIN) = [(1.6V + 0.1V) / (1 - (0.5μs × 1.0 / 1.58μs))] +
0.1V - 0.1V = 2.5V
Therefore, V IN must be greater than 2.5V, even with
very large output capacitance, and a practical input
voltage with reasonable output capacitance would be
3.2V.
Adjusting V OUT with a Resistive Divider
The output voltage can be adjusted with a resistive-
divider rather than the DAC if desired (Figure 9). The
drawback is that the on-time doesn ’ t automatically
receive correct compensation for changing output volt-
age levels. This can result in variable switching fre-
quency as the resistor ratio is changed, and/or
excessive switching frequency. The equation for adjust-
ing the output voltage is:
V OUT = V FB (1 + R1 / (R2 || R INT ))
where V FB is the currently selected DAC value, and
R INT is the FB input resistance. In resistor-adjusted cir-
cuits, the DAC code should be set as close as possible
to the actual output voltage in order to minimize the
shift in switching frequency.
Adjusting V OUT Above 2V
The feed-forward circuit that makes the on-time depen-
V IN(MIN) =
1 –
t OFF(MIN) h
K
+ V DROP2 – V DROP1
dent on the input voltage maintains a nearly constant
switching frequency as V+, I LOAD , and the DAC code
are changed. This works extremely well as long as FB
is connected directly to the output. When the output is
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27
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