参数资料
型号: MAX17410GTM+T
厂商: Maxim Integrated
文件页数: 42/45页
文件大小: 0K
描述: IC CTLR QPWM 2PH FOR IMV 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: *
Dual-Phase, Quick-PWM Controller
for IMVP6+ CPU Core Power Supplies
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N H ), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I LOAD(MAX) but are not quite high enough to exceed
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can “over design” the
? ? I
?
? V
PD (N H Resistive) = ? OUT ? ? LOAD ? R DS ( ON )
I LOAD TOTAL ? I VALLEY ( MAX ) +
= η
? V IN ? ? η TOTA L ?
2
circuit to tolerate:
?
?
Δ I INDUCTOR ?
?
2 ?
= η TOTAL I VALLEY ( MAX ) + ?
?
?
?
η TOTAL
PD (N H Switching) = ? ? ? I ?
where η TOTAL is the total number of phases.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R DS(ON) required to stay within package
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R DS(ON) ) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in the high-side
MOSFET (N H ) due to switching losses is difficult since it
must allow for difficult quantifying factors that influence
the turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including verification
using a thermocouple mounted on N H :
? V IN(MAX ) I LOAD f SW ? ? Q G(SW ) ?
? ? ? GATE ?
? I LOAD(MAX ) LIR ?
2
where I VALLEY(MAX) is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (D L ) with a forward voltage
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. Select a
diode that can handle the load current per phase dur-
ing the dead times. This diode is optional and can be
removed if efficiency is not critical.
Boost Capacitors
The boost capacitors (C BST ) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1 μF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1μF. For these applications,
C OSS IN SW
V f
+
2
2
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
where C OSS is the N H MOSFET’s output capacitance,
Q G(SW) is the charge needed to turn on the N H MOSFET,
and I GATE is the peak gate-drive source/sink current
(2.2A, typ).
C BST =
N × Q GATE
200 mV
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
x V IN 2 x f SW switching-loss equation. If the high-side
MOSFET chosen for adequate R DS(ON) at low battery
voltages becomes extraordinarily hot when biased from
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
where N is the number of high-side MOSFETs used for
one regulator, and Q GATE is the gate charge specified
in the MOSFET’s data sheet. For example, assume (2)
IRF7811W n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a sin-
gle IRF7811W has a maximum gate charge of 24nC
(V GS = 5V). Using the above equation, the required
boost capacitance would be:
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at maximum input voltage:
C BST =
2 × 24nC
200 mV
= 0 . 24 μF
? V OUT ? ? ? I LOAD ? 2
? V IN ( MAX ) ? ? ? ? η TOTAL ?
? ?
?
PD (N L Resistive) = ? 1 ? ? ? ? ? ? R DS ( ON )
Selecting the closest standard value, this example
requires a 0.22μF ceramic capacitor.
42
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MAX17411GTM+T 功能描述:电流型 PWM 控制器 IMVP7 CPU & Graphics Controller RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
MAX17411RGTM+ 功能描述:电流型 PWM 控制器 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
MAX17411RGTM+T 功能描述:电流型 PWM 控制器 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
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