参数资料
型号: MAX3799ETJ+T
厂商: Maxim Integrated
文件页数: 26/36页
文件大小: 0K
描述: IC AMP LIMITING VCSEL DVR 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 激光二极管驱动器
数据速率: 14Gbps
通道数: 1
电源电压: 2.85 V ~ 3.63 V
电流 - 电源: 97mA
电流 - 调制: 12mA
电流 - 偏置: 15mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
安装类型: 表面贴装
MAX3799
1Gbps to 14Gbps, SFP+ Multirate Limiting
Amplifier and VCSEL Driver
Modulation Current Increment Setting Register (MODINC)
Bit #
7
6
5
4
3
2
1
0
ADDRESS
Name
SET_IMOD
[0]
X
DE_INC
MODINC[4]
(MSB)
MODINC[3] MODINC[2] MODINC[1]
MODINC[0]
(LSB)
H0x0C
Default Value
0
0
0
0
0
0
0
0
Bit 7: SET_IMOD[0]. This is the LSB of the SET_IMOD[8:0] bits. This bit can only be updated by the use of
MODINC[4:0].
Bit 5: DE_INC. When this bit is set to 1 and the deemphasis on the transmit output is enabled, the SET_TXDE[3:0] is
incremented or decremented by 1 LSB. The increment or decrement is determined by the sign bit of the MODINC[4:0]
string of bits.
Bits 4 to 0: MODINC[4:0]. This string of bits is used to increment or decrement the modulation current. When written
to, the SET_IMOD[8:0] bits are updated. MODINC[4:0] are a two’s complement string.
Bias Current Increment Setting Register (BIASINC)
Bit #
7
6
5
4
3
2
1
0
ADDRESS
Name
SET_IBIAS
[0]
X
X
BIASINC[4]
(MSB)
BIASINC[3] BIASINC[2] BIASINC[1]
BIASINC[0]
(LSB)
H0x0D
Default Value
0
0
0
0
0
0
0
0
Bit 7: SET_IBIAS[0]. This is the LSB of the SET_IBIAS[8:0] bits. This bit can only be updated by the use of BIASINC[4:0].
Bits 4 to 0: BIASINC[4:0]. This string of bits is used to increment or decrement the bias current. When written to, the
SET_IBIAS[8:0] bits are updated. BIASINC[4:0] are a two’s complement string.
Mode Control Register (MODECTRL)
Bit #
7
6
5
4
3
2
1
0
ADDRESS
Name
MODECTRL MODECTRL MODECTRL MODECTRL MODECTRL MODECTRL MODECTRL MODECTRL
[7] (MSB)      [6]         [5]         [4]         [3]         [2]         [1]      [0] (LSB)
H0x0E
Default Value
0
0
0
0
0
0
0
0
Bits 7 to 0: MODECTRL[7:0]. The MODECTRL register enables a switch between normal and setup modes. The
setup mode is achieved by setting this register to H0x12. MODECTRL must be updated before each write operation.
Exceptions are MODINC and BIASINC, which can be updated in normal mode.
Transmitter Pulse-Width Control Register (SET_PWCTRL)
Bit #
7
6
5
4
3
2
1
0
ADDRESS
Name
X
X
X
X
SET_
PWCTRL[3]
(MSB)
SET_ SET_
PWCTRL[2] PWCTRL[1]
SET_
PWCTRL[0]
(LSB)
H0x0F
Default Value
X
X
X
X
0
0
0
0
Bits 3 to 0: SET_PWCTRL[3:0]. This is a 4-bit register used to control the eye crossing by adjusting the pulse width.
26
Maxim Integrated
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