参数资料
型号: MAX3799ETJ+T
厂商: Maxim Integrated
文件页数: 5/36页
文件大小: 0K
描述: IC AMP LIMITING VCSEL DVR 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 激光二极管驱动器
数据速率: 14Gbps
通道数: 1
电源电压: 2.85 V ~ 3.63 V
电流 - 电源: 97mA
电流 - 调制: 12mA
电流 - 偏置: 15mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
安装类型: 表面贴装
MAX3799
1Gbps to 14Gbps, SFP+ Multirate Limiting
Amplifier and VCSEL Driver
ELECTRICAL CHARACTERISTICS (continued)
(V CC = 2.85V to 3.63V, T A = -40°C to +85°C, CML receiver output load is AC-coupled to differential 100 ? , C AZ = 1nF, transmitter out-
put load is AC-coupled to differential 100 ? (see Figure 1), typical values are at +25°C, V CC = 3.3V, I BIAS = 6mA, I MOD = 6mA, unless
otherwise specified. Registers are set to default values unless otherwise noted, and the 3-wire interface is static during measure-
ments. For testing, the RATE_SEL bit was used and the RSEL pin was left open.)
PARAMETER
BIAS Current DAC Stability
SYMBOL
2mA
I BIAS
CONDITIONS
15mA (Notes 2, 10)
MIN
TYP
MAX
4
UNITS
%
Compliance Voltage at BIAS
BIAS Current Monitor Current
Gain
Compliance Voltage at BMON
V BIAS
I BMON
V BMON
External resistor to GND defines the
voltage gain
0.9
0
16
2.1
1.8
V
mA/A
V
BIAS Current Monitor Current
Gain Stability
I BMON
2mA
I BIAS
15mA (Note 10)
5
%
Tx SAFETY FEATURES
Average voltage, FAULT warning always
Excessive Voltage at BMON
V BMON
occurs for V BMON V CC - 0.55V, FAULT
warning never occurs for V BMON V CC -
V CC -
0.65V
V CC -
0.6V
V CC -
0.55V
V
0.65V
Average voltage, FAULT always occurs for
Excessive Voltage at BIAS
V BIAS
V BIAS
0.44V, FAULT never occurs for
0.44
0.48
0.65
V
V BIAS
0.65V
Maximum VCSEL Current in Off
State
I OFF
FAULT or DISABLE, V BIAS = V CC
25
μA
SFP TIMING REQUIREMENTS
Time from rising edge of DISABLE input
DISABLE Assert Time
t_ OFF
signal to I BIAS = I BIASOFF and I MOD =
1
μs
I MODOFF
Time from falling edge of DISABLE to I BIAS
DISABLE Negate Time
t_ ON
and I MOD at 90% of steady state when
500
μs
FAULT = 0 before reset
FAULT Reset Time of Power-On
Time
FAULT Reset Time
DISABLE to Reset
t_ INIT
t_ FAULT
Time from power-on or negation of FAULT
using DISABLE
Time from fault to FAULT on,
C FAULT 20pF, R FAULT = 4.7k
Time DISABLE must be held high to reset
FAULT
5
100
10
ms
μs
μs
OUTPUT_LEVEL VOLTAGE DAC (SET_CML)
Full-Scale Voltage
V FS
100
differential resistive load
1200
mV P-P
Resolution
5
mV P-P
Integral Nonlinearity
INL
5mA
I CML_LEVEL
20mA
±0.9
LSB
LOS THRESHOLD VOLTAGE DAC (SET_LOS)
Full-Scale Voltage
Resolution
V FS
94
1.5
mV P-P
mV P-P
Integral Nonlinearity
INL
11mV P-P
V TH_LOS
94mV P-P
±0.7
LSB
BIAS CURRENT DAC (SET_IBIAS)
Full-Scale Current
Maxim Integrated
I FS
21
mA
5
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