参数资料
型号: MAX5099ATJ+T
厂商: Maxim Integrated Products
文件页数: 12/27页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ DL 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 17.1 V
输入电压: 4.5 V ~ 19 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 2.2MHz
电流 - 输出: 1A,2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 32-TQFN-EP(5x5)
Dual, 2.2MHz, Automotive Synchronous Buck
Converter with 80V Load-Dump Protection
Pin Description (continued)
PIN
15
16
17
18
19
20
21
22, 23
24, 25
26
27
28
29
30
31
NAME
SGND
BYPASS
FSEL_1
COMP1
FB1
EN1
PGOOD1
DRAIN1
SOURCE1
BST1/VDD1
VDRV
DL1
PGND
DL2
BST2/VDD2
EP
FUNCTION
Signal Ground. Connect SGND to exposed pad and to the board signal ground plane. Connect the board
signal ground and power ground planes together at a single point.
Reference Output Bypass Connection. Bypass to SGND with a 0.22μF or greater ceramic capacitor.
Converter 1 Frequency Select Input. Connect FSEL_1 to V L for normal operation. Connect FSEL_1 to SGND
to reduce converter 1’s switching frequency to 1/2 of converter 2’s switching frequency (converter 1
switching frequency is 1/4 the SYNC frequency). Do not leave FSEL_1 unconnected.
Converter 1 Internal Transconductance Amplifier Output. See the Compensation section.
Converter 1 Feedback Input. Connect FB1 to a resistive divider between converter 1’s output and SGND to
adjust the output voltage. To set the output voltage below 0.8V, connect FB1 to a resistive voltage-divider
from BYPASS to regulator 1’s output (Figure 2). See the Setting the Output Voltage section.
Converter 1 Active-High Enable Input. Connect to V L for an always-on operation.
Converter 1 Power-Good Output. Open-drain output goes low when converter 1’s output falls below 92.5%
of its set regulation voltage. Use PGOOD1 and EN2 to sequence the converters (converter 1 starts first).
Converter 1 Internal MOSFET Drain Connection. For buck converter operation, use the MOSFET as a high-
side switch and connect DRAIN1 to the DC-DC converters supply input rail. For boost converter operation,
use the MOSFET as a low-side switch and connect DRAIN1 to the inductor and diode junction (Figure 5).
Converter 1 Internal MOSFET Source Connection. For buck operation, connect SOURCE1 to the switched
side of the inductor. For boost operation, connect SOURCE1 to PGND (Figure 5).
Converter 1 Bootstrap Flying-Capacitor Connection. For buck converter operation, connect BST1/VDD1 to a
0.1μF ceramic capacitor and diode according to the Typical Application Circuit . For boost converter
operation, driver bypass capacitor connection. Connect to VDRV and bypass with a 0.1μF ceramic
capacitor to PGND (Figure 5).
Low-Side Driver Supply Input. Connect VDRV to VL through an RC filter to bypass switching noise to the
internal VL regulator. For buck converter operation, connect anode terminals of external bootstrap diodes to
VDRV. For boost converter operation, connect VDRV to BST1/VDD1 and BST2/VDD2.
Bypass with a minimum 2.2μF ceramic capacitor to PGND (see the Typical Application Circuit ). Do not
connect to an external supply .
Converter 1 Low-Side Synchronous-Rectifier Gate Driver Output
Power Ground. Connect to the board power ground plane.
Converter 2 Low-Side Synchronous-Rectifier Gate Driver Output
Converter 2 Bootstrap Flying-Capacitor Connection. For buck converter operation, connect BST2/VDD2 to a
0.1μF ceramic capacitor and diode according to the Typical Application Circuit . For boost converter
operation, driver bypass capacitor connection. Connect to VDRV and bypass with a 0.1μF ceramic
capacitor from BST2/VDD2 to PGND (Figure 5).
Exposed Pad. Connect EP to SGND. For enhanced thermal dissipation, connect EP to a copper area as
large as possible. Do not use EP as the sole ground connection.
12
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