参数资料
型号: MAX8643ETG+T
厂商: Maxim Integrated Products
文件页数: 13/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 24TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 3.2 V
输入电压: 2.35 V ~ 3.6 V
PWM 型: 电压模式
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 24-TQFN-EP(4x4)
3A, 2MHz Step-Down Regulator
with Integrated Switches
The zero-cross frequency of the closed-loop, f C , should
COMPENSATION
TRANSFER
FUNCTION
DOUBLE POLE
OPEN-LOOP
GAIN
THIRD
POLE
be between 10% and 20% of the switching frequency,
f S . A higher zero-cross frequency results in faster tran-
sient response. Once f C is chosen, C1 is calculated
from the following equation:
2 x π x R 3 x ( 1 + L ) × f C
GAIN (dB)
POWER-STAGE
TRANSFER
SECOND
POLE
C 1 =
1 . 5625 V IN
R
R O
FUNCTION
FIRST AND SECOND ZEROS
Figure 4. Type III Compensation Illustration
Due to the underdamped nature of the output LC dou-
ble pole, set the two zero frequencies of the type III
compensation less than the LC double-pole frequency
to provide adequate phase boost. Set the two zero fre-
quencies to 80% of the LC double-pole frequency.
Hence:
f Z 2 _ EA =
1
2 π x R 3 x C 3
R 1 =
1
0 . 8 x C 1
x
L x C O x ( R O + ESR )
R L + R O
f P 3 _ EA =
f P 2 _ EA =
1 L x C O x ( R O + ESR )
1
2 π x R 1 x C 2
1
2 π x R 2 x C 3
C 3 = x
0 . 8 x R 3 R L + R O
Setting the second compensation pole, f P2_EA , at
f Z_ESR yields:
The above equations are based on the assumptions
that C1>>C2, and R3>>R2, which are true in most
applications. Placements of these poles and zeros are
R 2 =
C O x ESR
C 3
C 2 =
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a
function of the desired closed-loop bandwidth. The fol-
lowing section outlines the step-by-step design proce-
dure to calculate the required compensation
components for the MAX8643. When the output voltage
of the MAX8643 is programmed to a preset voltage, R3
is internal to the IC and R4 does not exist (Figure 3b).
When externally programming the MAX8643 (Figure
3a), the output voltage is determined by:
Set the third compensation pole at 1/2 of the switching
frequency to gain some phase margin. Calculate C2 as
follows:
1
π x R 1 x f S × 2
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
R 4 =
0 . 6 × R 3
( V OUT ? 0 . 6 )
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
type III compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. The recommended range for R3 is
2k ? to 10k ? . Note that the loop compensation remains
unchanged if only R4’s resistance is altered to set dif-
ferent outputs.
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13
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