参数资料
型号: MAX8643ETG+T
厂商: Maxim Integrated Products
文件页数: 9/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 24TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 3.2 V
输入电压: 2.35 V ~ 3.6 V
PWM 型: 电压模式
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 24-TQFN-EP(4x4)
3A, 2MHz Step-Down Regulator
with Integrated Switches
Typical Application Circuit
INPUT
2.4V TO 3.6V
IN
BST
C10
C6
22 μ F
C7
0.01 μ F
V DD
R5
10 Ω
MAX8643
0.1 μ F
L1
0.47 μ H
OUTPUT
1.8V, 3A
LX
V DD
C5
1 μ F
OUT
C3
560pF
C8
22 μ F
C9
0.01 μ F
CTL2
CTL1
PGND
R3
158 Ω
EN
FREQ
FB
C2
1500pF
R2
2.67k Ω
REFIN
R4
50k Ω
C4
0.022 μ F
SS
COMP
C1
33pF
V DD
R1
20k Ω
GND
Figure 1. 1MHz, All-Ceramic Capacitor Design with V OUT = 1.8V
Detailed Description
The MAX8643 high-efficiency, voltage-mode switching
regulator is capable of delivering up to 3A of output
current. The MAX8643 provides output voltages from
0.6V to (0.9 x V IN ) from 2.35V to 3.6V input supplies,
making it ideal for on-board point-of-load applications.
The output voltage accuracy is better than ±1% over
load, line, and temperature.
The MAX8643 features a wide switching frequency
range, allowing the user to achieve all-ceramic capaci-
tor designs and fast transient responses. The high oper-
ating frequency minimizes the size of external
components. The MAX8643 is available in a small (4mm
x 4mm), lead-free, 24-pin thin QFN package. The REFIN
function makes the MAX8643 an ideal candidate for
DDR and tracking power supplies. Using internal low-
R DSON (37m Ω ) n-channel MOSFETs for both high- and
low-side switches maintains high efficiency at both
heavy-load and high-switching frequencies.
The MAX8643 employs voltage-mode control architec-
ture with a high-bandwidth (> 14MHz) error amplifier.
The voltage-mode control architecture allows up to
2MHz switching frequency, reducing board area. The
op-amp voltage-error amplifier works with type 3 com-
PWRGD
pensation to fully utilize the bandwidth of the high-fre-
quency switching to obtain fast transient response.
Adjustable soft-start time provides flexibilities to mini-
mize input startup inrush current. An open-drain,
power-good (PWRGD) output goes high when V FB
reaches 90% of V REFIN or 0.54V.
Controller Function
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The break-before-make logic and
the timing for charging the bootstrap capacitors are
calculated by the controller logic block. The error signal
from the voltage-error amplifier is compared with the
ramp signal generated by the oscillator at the PWM
comparator and, thus, the required PWM signal is pro-
duced. The high-side switch is turned on at the begin-
ning of the oscillator cycle and turns off when the ramp
voltage exceeds the V COMP signal or the current-limit
threshold is exceeded. The low-side switch is then
turned on for the remainder of the oscillator cycle.
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9
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