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参数资料
| 型号： | MAX8734AEEI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/33页 |
| 文件大小： | 0K |
| 描述： | IC PWR SUPPLY CONTROLLER 28QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 电源控制器 |
| 输入电压： | 4.5 V ~ 24 V |
| 电流 - 电源： | 25µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-QSOP |
| 供应商设备封装： | 28-QSOP |
| 包装： | 带卷 (TR) |
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High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
Pin Description (continued)
PIN
MAX8732A
MAX8733A
MAX8734A
NAME
FUNCTION
5V SMPS Current-Sense Input. Connect CS5 to a current-sensing resistor from the source of
13
—
CS5
the synchronous rectifier to GND. The voltage at ILIM5 determines the current-limit threshold
(see the Current-Limit Circuit (ILIM_) section).
—
13
TON
Frequency Select Input. Connect to V CC for 200kHz/300kHz operation and to GND for
400kHz/500kHz operation (5V/3.3V SMPS switching frequencies, respectively).
Boost Flying Capacitor Connection for 5V SMPS. Connect to an external capacitor and diode
14
14
BST5
according to the typical application circuits (Figure 1 and Figure 2). See the MOSFET Gate
Drivers (DH_, DL_) section.
15
16
17
15
16
17
LX5
DH5
V CC
Inductor Connection for 5V SMPS. LX5 is the internal lower supply rail for the DH5 high-side
gate driver. LX5 is the current-sense input for the 5V SMPS (MAX8734A only).
High-Side MOSFET Floating Gate-Driver Output for 5V SMPS. DH5 swings from LX5 to BST5.
Analog Supply Voltage Input for PWM Core. Connect V CC to the system supply voltage with a
series 50 ? resistor. Bypass to GND with a 1μF ceramic capacitor.
5V Linear-Regulator Output. LDO5 is the gate-driver supply for the external MOSFETs. LDO5
can provide a total of 100mA, including MOSFET gate-drive requirements and external loads.
The internal load depends on the choice of MOSFET and switching frequency (see the
18
18
LDO5
Reference and Linear Regulators (REF, LDO5, and LDO3) section). If OUT5 is greater than
the LDO5 bootstrap switch threshold, the LDO5 regulator shuts down and the LDO5 pin
connects to OUT5 through a 1.4 ? switch. Bypass LDO5 with a minimum of 4.7μF. Use an
additional 1μF per 5mA of load.
19
19
DL5
5V SMPS Synchronous Rectifier Gate-Drive Output. DL5 swings between GND and LDO5.
Power-Supply Input. V+ powers the LDO5/LDO3 linear regulators and is also used for the
20
20
V+
Quick-PWM on-time, one-shot circuits. Connect V+ to the battery input and bypass with a
0.1μF capacitor.
5V SMPS Output Voltage-Sense Input. Connect to the 5V SMPS output. OUT5 is an input to
21
21
OUT5
the Quick-PWM on-time, one-shot circuit. It also serves as the 5V feedback input in fixed-
voltage mode. If OUT5 is greater than the LDO5 bootstrap-switch threshold, the LDO5 linear
regulator shuts down and LDO5 connects to OUT5 through a 1.4 ? switch.
3.3V SMPS Output Voltage-Sense Input. Connect to the 3.3V SMPS output. OUT3 is an input
22
22
OUT3
to the Quick-PWM on-time, one-shot circuit. It also serves as the 3V feedback input in fixed-
voltage mode. If OUT3 is greater than the LDO3 bootstrap-switch threshold, the LDO3 linear
regulator shuts down and LDO3 connects to OUT3 through a 1.5 ? switch.
23
24
23
24
GND
DL3
Analog and Power Ground
3.3V SMPS Synchronous-Rectifier Gate-Drive Output. DL3 swings between GND and LDO5.
3.3V Linear-Regulator Output. LDO3 powers up after REF is in regulation. LDO3 can provide
25
25
LDO3
a total of 100mA to external loads. If OUT3 is greater than the LDO3 bootstrap-switch
threshold, the LDO3 regulator shuts down and the LDO3 pin connects to OUT3 through a
1.5 ? switch. Bypass LDO3 with a minimum of 4.7μF. Use an additional 1μF per 5mA of load.
26
27
26
27
DH3
LX3
High-Side MOSFET Floating Gate-Driver Output for 3.3V SMPS. DH3 swings from LX3 to
BST3.
Inductor Connection for 3.3V SMPS. LX3 is the current-sense input for the 3.3V SMPS
(MAX8734A only).
Boost Flying Capacitor Connection for 3.3V SMPS. Connect to an external capacitor and
28
28
BST3
diode according to the typical application circuits (Figure 1 and Figure 2). See the MOSFET
Gate Drivers (DH_, DL_) section.
______________________________________________________________________________________
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