参数资料
型号: MAX8734AEEI+T
厂商: Maxim Integrated Products
文件页数: 26/33页
文件大小: 0K
描述: IC PWR SUPPLY CONTROLLER 28QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源控制器
输入电压: 4.5 V ~ 24 V
电流 - 电源: 25µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 带卷 (TR)
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
R ESR ≤
V P ? P
LIR × I LOAD ( MAX )
where LIR is the inductor ripple current ratio and I LOAD
is the average DC load. Using LIR = 0.35 and an aver-
age load current of 5A, the ESR needed to support
50mV P-P ripple is 28m ? .
where V P-P is the peak-to-peak output voltage ripple.
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lum, OS-CON, and other electrolytic-type capacitors).
When using low-capacity filter capacitors such as
polymer types, capacitor size is usually determined by
the capacity required to prevent V SAG and V SOAR from
tripping the undervoltage and overvoltage fault latches
during load transients in ultrasonic mode.
For low input-to-output voltage differentials (V IN / V OUT
< 2), additional output capacitance is required to main-
tain stability and good efficiency in ultrasonic mode.
The amount of overshoot due to stored inductor energy
can be calculated as:
Do not place high-value ceramic capacitors directly
across the fast-feedback inputs (OUT_ to GND for inter-
nal feedback, FB_ divider point for external feedback)
without taking precautions to ensure stability. Large
ceramic capacitors can have a high-ESR zero frequency
and cause erratic, unstable operation. Adding a discrete
resistor or placing the capacitors a couple of inches
downstream from the junction of the inductor and OUT_
may improve stability.
Unstable operation manifests itself in two related but
distinctly different ways: double pulsing and fast-feed-
back loop instability. Noise on the output or insufficient
ESR may cause double pulsing. Insufficient ESR does
not allow the amplitude of the voltage ramp in the output
signal to be large enough. The error comparator mistak-
enly triggers a new cycle immediately after the 350ns
minimum off-time period has expired. Double pulsing
results in increased output ripple, and can indicate the
V SOAR =
I PEAK 2 L
2 C OUT V OUT _
presence of loop instability caused by insufficient ESR.
Loop instability results in oscillations or ringing at the
output after line or load perturbations, causing the out-
where I PEAK is the peak inductor current.
Stability Considerations
Stability is determined by the value of the ESR zero
(f ESR ) relative to the switching frequency (f). The point
of instability is given by the following equation:
put voltage to fall below the tolerance limit.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient (refer to the
MAX8734A EV kit data sheet) and observe the output
voltage-ripple envelope for overshoot and ringing.
Monitoring the inductor current with an AC current
where:
f ESR ≤
f
π
probe can also provide some insight. Do not allow
more than one cycle of ringing of under- or overshoot
after the initial step response.
Input-Capacitor Selection
f ESR =
1
2 π R ESR C OUT
The input capacitors must meet the input-ripple-current
(I RMS ) requirement imposed by the switching current.
The MAX8732A/MAX8733A/MAX8734A dual switching
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Low-ESR capacitors (especially polymer or tantalum),
in widespread use at the time of publication, typically
have ESR zero frequencies lower than 30kHz. In the
design example used for inductor selection, the ESR
needed to support a specified ripple voltage is found
by the equation:
regulators operate at different frequencies. This inter-
leaves the current pulses drawn by the two switches and
reduces the overlap time where they add together. The
input RMS current is much smaller in comparison than
with both SMPSs operating in phase. The input RMS cur-
rent varies with load and the input voltage.
ESR =
V RIPPLE ( P ? P )
LIR × I LOAD
26
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