参数资料
型号: MAX9856ETL+T
厂商: Maxim Integrated Products
文件页数: 8/46页
文件大小: 0K
描述: IC AUDIO CODEC 40TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 音频编解码器
数据接口: 串行
分辨率(位): 18 b
ADC / DAC 数量: 2 / 2
三角积分调变:
S/N 比,标准 ADC / DAC (db): 77 / 91
动态范围,标准 ADC / DAC (db): 85 / 91
电压 - 电源,模拟: 1.71 V ~ 3.6 V
电压 - 电源,数字: 1.71 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 带卷 (TR)
MAX9856
Low-Power Audio CODEC with
DirectDrive Headphone Amplifiers
16
______________________________________________________________________________________
Pin Description (continued)
PIN
NAME
FUNCTION
25
BCLK
Digital Audio Bit Clock Input/Output. BCLK is an input when the MAX9856 is in slave mode and an output
when in master mode.
26
SDOUT
Digital Audio Serial Data ADC Output
27
SDIN
Digital Audio Serial Data DAC Input
28
DVDDS2
Digital Audio Interface I/O Power Supply. Bypass to DGND with 1F capacitor.
29
LRCLK_A
Digital Audio Left-Right Clock Input/Output. LRCLK_A is the audio sample rate clock that determines
whether the audio data on SDOUT is routed to the left or right channel. When only one LRCLK is needed
(ADC and DAC are at the same sample rate), LRCLK_A can be reprogrammed as a general-purpose
input/output, GPIO.
30
MCLK
Master Clock Input (CMOS Input). Acceptable Input frequency range: 10MHz to 60MHz.
31
DVDD
Digital Power Supply. Supply for the digital core and I2C interface. Bypass to DGND with a 1.0F capacitor.
32
DGND
Digital Ground
33
INLN
Inverting Left Differential Input. AC-couple to the low side of microphone, or connect to the negative line
signal. AC-couple to ground when using with a single-ended line or microphone input.
34
INLP
Noninverting Left Differential Input. AC-couple to the high side of microphone, or connect to the positive
line signal. AC-couple to the signal when using with a single-ended line or microphone input.
35
MICL
Left-Channel Single-Ended Microphone Input. AC-couple to the microphone with a 1F capacitor.
36
MICGND
Microphone Ground. Allows the common return signal of a stereo microphone pair to be connected to the
inverting input differential amps in a pseudo differential configuration. Alternatively MICGND can be
grounded for single-ended microphone applications.
37
MICR
Right-Channel Single-Ended Microphone Input. AC-couple to the microphone with a 1F capacitor.
38
MICBIAS
Low-Noise Bias Voltage. Outputs a 1.5V or 2.4V microphone bias. An external resistor in the 2.2k
Ω to 470Ω
range should be used to set the microphone current.
39
AGND
Analog Ground (and Chip Substrate)
40
JACKSNS
Jack Sense. Detects the presence or absence of a jack, and can be configured to detect the impedance
range of the external load. See the Headset Detection section.
—EP
Exposed Pad. The exposed pad lowers the package’s thermal impedance by providing a direct heat
conduction path from the die to the PCB. The exposed pad is internally connected to the substrate.
Connect the exposed thermal pad to AGND.
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