参数资料
型号: MB90F523PFV-G
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP120
封装: PLASTIC, QFP-120
文件页数: 50/127页
文件大小: 2636K
代理商: MB90F523PFV-G
29
MB90520 Series
Descriptions for initial value
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is indeterminate.
– : This bit is not used. The initial value is indeterminate.
*1: This area is the only external access area having an address of 0000FFH or lower. An access operation to this
area is handled as that to external I/O area.
*2: For details of the RAM area, see the memory map.
*3: The reserved area is basically disabled because it is used in the system.
*4: Area used by the system is the area set by the resistor for evaluating tool.
Notes: For bits that is initialized by an reset operation, the initial value set by the reset operation is listed as an
initial value. Note that the values are different from reading results.
For LPMCR/CKSCR/WDTC, there are cases where initialization is performed or not performed, depending
on the types of the reset. However initial value for resets that initializes the value are listed.
The addresses following 0000FFH are reserved. No external bus access signal is generated.
Boundary ####H between the RAM area and the reserved area varies with the product model.
Channels 0 to 3 of the OCU compare register use 16-bit free-run timer 2, while channels 4 to 7 of the OCU
compare register use 16-bit free-run timer 1. 16-bit free-run timer 1 is also used by input captures (ICU)
0 and 1.
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