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参数资料
| 型号： | MBM29DL161TD-70PFTR-E1 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 1M X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封装： | PLASTIC, REVERSE, TSOP-48 |
| 文件页数： | 28/80页 |
| 文件大小： | 565K |
| 代理商： | MBM29DL161TD-70PFTR-E1 |
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MBM29DL16XTD/BD-70/90
Retired Product DS05-20874-8E_July 12, 2007
34
If the software (program code) for Autoselect command is stored into the Flash memory, the device and
manufacture codes should be read from the other bank where is not contain the software.
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register, and
also to write the Autoselect command during the operation, execute it after writing Read/Reset command
sequence.
Byte/Word Programming
The devices are programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle
operation. There are two “unlock” write cycles. These are followed by the program set-up command and data
write cycles. Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is
latched on the rising edge of CE or WE, whichever happens first. The rising edge of CE or WE (whichever
happens first) begins programming. Upon executing the Embedded Program Algorithm command sequence,
the system is not required to provide further controls or timings. The device will automatically provide adequate
internally generated program pulses and verify the programmed cell margin.
The system can determine the status of the program operation by using DQ7 (Data Polling), DQ6 (Toggle Bit),
or RY/BY. The Data Polling and Toggle Bit must be performed at the memory location which is being programmed.
The automatic programming operation is completed when the data on DQ7 is equivalent to data written to this
bit at which time the devices return to the read mode and addresses are no longer latched. (See “Hardware
Sequence Flags Table”.) Therefore, the devices require that a valid address to the devices be supplied by the
system at this particular instance of time. Hence, Data Polling must be performed at the memory location which
is being programmed.
Any commands written to the chip during this period will be ignored. If hardware reset occurs during the
programming operation, it is impossible to guarantee the data are being written.
Programming is allowed in any sequence and across sector boundaries. Beware that a data “0” cannot be
programmed back to a “1”. Attempting to do so may either hang up the device or result in an apparent success
according to the data polling algorithm but a read from Read/Reset mode will show that the data is still “0”. Only
erase operations can convert “0”s to “1”s.
“(1) Embedded ProgramTM Algorithm” in
■FLOW CHART illustrates the Embedded ProgramTM Algorithm using
typical command strings and bus operations.
Chip Erase
Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase
Algorithm command sequence the devices will automatically program and verify the entire memory for an all
zero data pattern prior to electrical erase (Preprogram function). The system is not required to provide any
controls or timings during these operations.
The system can determine the status of the erase operation by using DQ7 (Data Polling), DQ6 (Toggle Bit), or
RY/BY. The chip erase begins on the rising edge of the last CE or WE, whichever happens first in the command
sequence and terminates when the data on DQ7 is “1” (See Write Operation Status section.) at which time the
device returns to read the mode.
Chip Erase Time; Sector Erase Time
× All sectors + Chip Program Time (Preprogramming)
“(2) Embedded EraseTM Algorithm” in
■FLOW CHART illustrates the Embedded EraseTM Algorithm using typical
command strings and bus operations.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MBM29DL161TD-90PBT | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TD-90PFTN | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TD-90PFTR | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TE | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:16M (2MX8/1MX16) BIT Dual Operation |
| MBM29DL161TE-12 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:16M (2M X 8/1M X 16) BIT Dual Operation |
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