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参数资料
| 型号： | MBM29DL161TD-70PFTR-E1 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 1M X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封装： | PLASTIC, REVERSE, TSOP-48 |
| 文件页数： | 33/80页 |
| 文件大小： | 565K |
| 代理商： | MBM29DL161TD-70PFTR-E1 |
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MBM29DL16XTD/BD-70/90
Retired Product DS05-20874-8E_July 12, 2007
39
Hardware Sequence Flags Table
*1 : Successive reads from the erasing or erase-suspend sector cause DQ2 to toggle.
*2 : Reading from non-erase suspend sector address will indicate logic “1” at the DQ2 bit.
DQ7
Data Polling
The MBM29DL16XTD/BD devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the
devices will produce the complement of the data last written to DQ7. Upon completion of the Embedded Program
Algorithm, an attempt to read the device will produce the true data last written to DQ7. During the Embedded
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ7 output. Upon completion of the
Embedded Erase Algorithm an attempt to read the device will produce a “1” at the DQ7 output. The flowchart
for Data Polling (DQ7) is shown in “(3) Data Polling Algorithm” (in
■FLOW CHART).
For programming, the Data Polling is valid after the rising edge of fourth write pulse in the four write pulse
sequence.
For chip erase and sector erase, the Data Polling is valid after the rising edge of the sixth write pulse in the six
write pulse sequence. Data Polling must be performed at sector address within any of the sectors being erased
and not a protected sector. Otherwise, the status may not be valid.
If a program address falls within a protected sector, Data Polling on DQ7 is active for approximately 1
μs, then
that bank returns to the read mode. After an erase command sequence is written, if all sectors selected for
erasing are protected, Data Polling on DQ7 is active for approximately 400
μs, then the bank returns to read mode.
Once the Embedded Algorithm operation is close to being completed, the MBM29DL16XTD/BD data pins (DQ7)
may change asynchronously while the output enable (OE) is asserted low. This means that the devices are
driving status information on DQ7 at one instant of time and then that byte’s valid data at the next instant of time.
Depending on when the system samples the DQ7 output, it may read the status or valid data. Even if the device
has completed the Embedded Algorithm operation and DQ7 has a valid data, the data outputs on DQ0 to DQ6
may be still invalid. The valid data on DQ0 to DQ7 will be read on the successive read attempts.
Status
DQ7
DQ6
DQ5
DQ3
DQ2
In Progress
Embedded Program Algorithm
DQ7
Toggle
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle*1
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ7
Toggle
0
1*2
Program
Suspended
Mode
Program Suspend Read
(Program Suspended Sector)
Data
Program Suspend Read
(Non-Program Suspended Sector)
Data
Exceeded
Time Limits
Embedded Program Algorithm
DQ7
Toggle
1
0
1
Embedded Erase Algorithm
0
Toggle
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ7
Toggle
1
0
N/A
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相关代理商/技术参数 |
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| MBM29DL161TD-90PBT | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TD-90PFTN | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TD-90PFTR | 制造商:SPANSION 制造商全称:SPANSION 功能描述:FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Dual Operation |
| MBM29DL161TE | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:16M (2MX8/1MX16) BIT Dual Operation |
| MBM29DL161TE-12 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:16M (2M X 8/1M X 16) BIT Dual Operation |
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