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参数资料
| 型号： | MBM29F800TA-70PFTN-E1 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 512K X 16 FLASH 5V PROM, 70 ns, PDSO48 |
| 封装： | PLASTIC, TSOP1-48 |
| 文件页数： | 8/49页 |
| 文件大小： | 693K |
| 代理商： | MBM29F800TA-70PFTN-E1 |
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MBM29F800TA-55/-70/-90/MBM29F800BA-55/-70/-90
15
s
s COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to the
read mode. “MBM29F800TA/BA Command Definitions” in s DEVICE BUS OPERATION defines the valid register
command sequences. Note that the Erase Suspend (B0h) and Erase Resume (30h) commands are valid only
while the Sector Erase operation is in progress. Moreover both Read/Reset commands are functionally
equivalent, resetting the device to the read mode. Please note that commands are always written at DQ7 to DQ0
and DQ15 to DQ8 bits are ignored.
Read/Reset Command
The read or eset operation is initiated by writing the Read/Reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the
command register contents are altered.
The device will automatically power-up in the read/reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during the power transition.
Refer to “s AC CHARACTERISTICS” and “s TIMING DIAGRAM” for the specific timing parameters.
Autoselect Command
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the devices reside in the target system. PROM
programmers typically access the signature codes by raising A9 to a high voltage. However, multiplexing high
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the Autoselect command sequence into the command register.
Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read
cycle from address XX01h for
×16 (XX02h for ×8) returns the device code (MBM29F800TA = D6h and
MBM29F800BA = 58h for
×8 mode; MBM29F800TA = 22D6h and MBM29F800BA = 2258h for ×16 mode). (See
“MBM29F800TA/BA Sector Protection Verify Autoselect Codes” and “Expanded Autoselect Code Table” in
s DEVICE BUS OPERATION.)
All manufacturer and device codes will exhibit odd parity with DQ7 defined as the parity bit.
Sector state (protection or unprotection) will be informed by address XX02h for
×16 (XX04h for ×8).
Scanning the sector addresses (A18, A17, A16, A15, A14, A13, and A12) while (A6, A1, A0) = (0, 1, 0) will produce a
logical “1” at device output DQ0 for a protected sector. The programming verification should be perform margin
mode on the protected sector (See “MBM29F800TA/BA User Bus Operation (BYTE = VIH)” and “MBM29F800TA/
BA User Bus Operation (BYTE = VIH)” in s DEVICE BUS OPERATION).
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register, and
also to write the Autoselect command during the operation, execute it after writing Read/Reset command
sequence.
Byte/Word Programming
The device is programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle operation.
There are two “unlock” write cycles. These are followed by the program set-up command and data write cycles.
Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The rising edge of CE or WE (whichever happens first) begins
programming. Upon executing the Embedded ProgramTM Algorithm command sequence, the system is not
required to provide further controls or timings. The device will automatically provide adequate internally generated
program pulses and verify the programmed cell margin.
The automatic programming operation is completed when the data on DQ7 is equivalent to data written to this
bit at which time the devices return to the read mode and addresses are no longer latched (See “Hardware
Sequence Flags”, Hardware Sequence Flags) Therefore, the devices require that a valid address to the devices
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MBM29F800TA-70PFTN-SFL(E1) | 制造商:Fujitsu 功能描述: |
| MBM29F800TA-70PFTN-SFLE1 | 制造商:Spansion 功能描述:IC 5V 8M FLASH |
| MBM29F800TA-70PFTR | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29F800TA-90 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29F800TA-90PF | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
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