参数资料
型号: MC56F8036VLF
厂商: Freescale Semiconductor
文件页数: 127/164页
文件大小: 0K
描述: IC DGTL SGNL CTLR 16BIT 48-LQFP
标准包装: 1,250
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 32MHz
连通性: CAN,I²C,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 39
程序存储器容量: 64KB(32K x 16)
程序存储器类型: 闪存
RAM 容量: 4K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 10x12b; D/A 2x12b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 48-LQFP
包装: 托盘
产品目录页面: 734 (CN2011-ZH PDF)
Register Descriptions
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor
65
5.6.3
Interrupt Priority Register 2 (IPR2)
Figure 5-5 Interrupt Priority Register 2 (IPR2)
5.6.3.1
QSCI 0 Transmitter Empty Interrupt Priority Level (QSCI0_XMIT IPL)—
Bits 15–14
This field is used to set the interrupt priority level for the QSCI0 Transmitter Empty IRQ. This IRQ is
limited to priorities 0 through 2. It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.3.2
Reserved—Bits 13–10
This bit field is reserved. Each bit must be set to 0.
5.6.3.3
QSPI 0 Transmitter Empty Interrupt Priority Level (QSPI0_XMIT IPL)—
Bits 9–8
This field is used to set the interrupt priority level for the QSPI0 Transmitter Empty IRQ. This IRQ is
limited to priorities 0 through 2. It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.3.4
QSPI 0 Receiver Full Interrupt Priority Level (QSPI0_RCV IPL)—Bits 7–6
This field is used to set the interrupt priority level for the QSPI0 Receiver Full IRQ. This IRQ is limited
to priorities 0 through 2. It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Base + $2
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
QSCI0_XMIT
IPL
0
QSPI0_XMIT
IPL
QSPI0_RCV
IPL
GPIOA IPL
GPIOB IPL
GPIOC IPL
Write
RESET
00000
0000000
0000
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