- 您现在的位置：买卖IC网 > PDF目录1948 > MC56F8257VLH (Freescale Semiconductor)DSC 64K FLASH 60MHZ 64-LQFP PDF资料下载
参数资料
| 型号： | MC56F8257VLH |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 41/88页 |
| 文件大小： | 0K |
| 描述： | DSC 64K FLASH 60MHZ 64-LQFP |
| 标准包装： | 160 |
| 系列： | 56F8xxx |
| 核心处理器： | 56800E |
| 芯体尺寸： | 16-位 |
| 速度： | 60MHz |
| 连通性： | CAN，I²C，LIN，SCI，SPI |
| 外围设备： | LVD，POR，PWM，WDT |
| 输入/输出数： | 54 |
| 程序存储器容量： | 64KB（32K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 4K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 16x12b，D/A 1x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 64-LQFP |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页当前第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Security Features
Freescale Semiconductor
46
If the ADC conversion result in SAMPLE1 is less than the value programmed into the low limit register 1,
PWM1_EXTB is driven high.
State of PWM2_EXTB:
If the ADC conversion result in SAMPLE2 is greater than the value programmed into the high limit register 2,
PWM2_EXTB is driven low.
If the ADC conversion result in SAMPLE2 is less than the value programmed into the low limit register 2,
PWM2_EXTB is driven high.
5.8
Joint Test Action Group (JTAG)/Enhanced On-Chip Emulator
(EOnCE)
The 56800E family includes extensive integrated support for application software development and real-time debugging. Two
modules, the Enhanced On-Chip Emulation (EOnCE) module and the core test access port (TAP, commonly called the JTAG
port), work together to provide these capabilities. Both are accessed through a common 4-pin JTAG/EOnCE interface. These
modules allow you to insert the MC56F825x/MC56F824x into a target system while retaining debug control. This capability is
especially important for devices without an external bus, because it eliminates the need for a costly cable to bring out the
footprint of the chip, as is required by a traditional emulator system.
The 56800E’s EOnCE module is a Freescale-designed module for developing and debugging application software used with
the chip. This module allows non-intrusive interaction with the CPU and is accessible through the pins of the JTAG interface
or by software program control of the 56800E core. Among the many features of the EOnCE module is support, in real-time
program execution, for data communication between the controller and the host software development and debug systems.
Other features allow for hardware breakpoints, the monitoring and tracking of program execution, and the ability to examine
and modify the contents of registers, memory, and on-chip peripherals, all in a special debug environment. No user-accessible
resources must be sacrificed to perform debugging operations.
The 56800E’s JTAG port provides an interface for the EOnCE module to the JTAG pins. The Joint Test Action Group (JTAG)
boundary scan is an IEEE 1149.1 standard methodology enabling access to test features using a test access port (TAP). A JTAG
boundary scan consists of a TAP controller and boundary scan registers. Contact your Freescale sales representative or
authorized distributor for device-specific BSDL information.
NOTE
In normal operation, an external pullup on the TMS pin is highly recommend to place the
JTAG state machine in reset state (if this pin is not configured as GPIO).
6
Security Features
The MC56F825x/MC56F824x offers security features intended to prevent unauthorized users from gaining access to and
reading the contents of the flash memory (FM) array. The MC56F825x/MC56F824x’s flash memory security consists of several
hardware interlocks.
After flash memory security is set, the application software can allow an authorized user to access on-chip memory by including
a user-defined software subroutine that reads and transfers the contents of internal memory via peripherals. This application
software can communicate over a serial port, for example, to validate the authenticity of the requested access and then to grant
it until the next device reset. The system designer must use discretion when deciding whether to support this type of “back door”
access technique.
6.1
Operation with Security Enabled
After you have programmed flash with the application code, or as part of programming the flash with the application code, you
can secure the MC56F825x/MC56F824x by programming the values 1 and 0 into bits 1 and 0, respectively, of program memory
location 0x00_7FF7. The CodeWarrior IDE menu flash lock command can also accomplish this task. The nonvolatile security
相关PDF资料 |
PDF描述 |
|---|---|
| MC56F8322VFAE | IC DSP 16BIT 60MHZ 48-LQFP |
| MC56F8323VFBE | IC MPU HYBRID DSP 32K 64-LQFP |
| MC56F8335VFGE | IC DIGITAL SIGNAL CTLR 128-LQFP |
| MC56F8345MFGE | IC DSP 16BIT 60MHZ 128-LQFP |
| MC56F8346VFVE | IC DSP 16BIT 60MHZ 144-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC56F825X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
| MC56F82723VFM | 制造商:Freescale Semiconductor 功能描述:MC56F Series 100 MHz 32 KB Flash 3 KB SRAM 32-Bit Microcontroller - QFN-32 |
| MC56F82726VLF | 制造商:Freescale Semiconductor 功能描述:MC56F82726 Series 32 Bit 100 MHz 32 kB Flash 3 KB SRAM Microcontroller - LQFP-48 |
| MC56F82726VLFR | 制造商:Freescale Semiconductor 功能描述:IC DSC 32BIT 32KB FLASH 48LQFP |
| MC56F82728VLH | 制造商:Freescale Semiconductor 功能描述:IC DSC 32BIT 32KB FLASH 64LQFP |
发布紧急采购，3分钟左右您将得到回复。