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参数资料
| 型号： | MC68HC05T7B |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封装： | SDIP-56 |
| 文件页数： | 47/109页 |
| 文件大小： | 9008K |
| 代理商： | MC68HC05T7B |
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Memory
RAM
MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 3.0
Technical Data
MOTOROLA
Memory
37
3.5 RAM
The 64 addresses from $00C0 to $00FF serve as both the user RAM and
the stack RAM. Before processing an interrupt, the CPU uses five bytes
of the stack to save the contents of the CPU registers. During a
subroutine call, the CPU uses two bytes of the stack to store the return
address. The stack pointer decrements when the CPU stores a byte on
the stack and increments when the CPU retrieves a byte from the stack.
NOTE:
Be careful when using nested subroutines or multiple interrupt levels.
The CPU may overwrite data in the RAM during a subroutine or during
the interrupt stacking operation.
3.6 EPROM/OTPROM
An MCU with a quartz window has 1240 bytes of erasable,
programmable ROM (EPROM). The quartz window allows EPROM
erasure with ultraviolet light.
NOTE:
Keep the quartz window covered with an opaque material except when
erasing the MCU. Ambient light can affect MCU operation.
In an MCU without the quartz window, the EPROM cannot be erased
and serves as 1240 bytes of one-time programmable ROM (OTPROM).
The following addresses are user EPROM/OTPROM locations:
$0300–$07CF
$07F8–$07FF, used for user-defined interrupt and reset vectors
The COP register (COPR) is an EPROM/OTPROM location at address
$07F0.
The mask option register (MOR) is an EPROM/OTPROM location at
address $07F1.
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