参数资料
型号: MC68HC705SR3PE
厂商: Freescale Semiconductor
文件页数: 53/96页
文件大小: 0K
描述: IC MCU 3.75K 2.1MHZ OTP 40-DIP
标准包装: 9
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 4MHz
外围设备: LED,POR
输入/输出数: 32
程序存储器容量: 3.75KB(3.75K x 8)
程序存储器类型: OTP
RAM 容量: 192 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
MC68HC05SR3
Freescale
8-3
CPU CORE AND INSTRUCTION SET
8
Interrupt (I)
When this bit is set, all maskable interrupts are masked. If an interrupt occurs while this bit is set,
the interrupt is latched and remains pending until the interrupt bit is cleared.
Negative (N)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
negative.
Zero (Z)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
zero.
Carry/borrow (C)
When set, this bit indicates that a carry or borrow out of the arithmetic logical unit (ALU) occurred
during the last arithmetic operation. This bit is also affected during bit test and branch instructions
and during shifts and rotates.
8.2
Instruction set
The MCU has a set of 62 basic instructions. They can be grouped into five different types as
follows:
Register/memory
Read/modify/write
–Branch
Bit manipulation
Control
The following paragraphs briefly explain each type. All the instructions within a given type are
presented in individual tables.
This MCU uses all the instructions available in the M146805 CMOS family plus one more: the
unsigned multiply (MUL) instruction. This instruction allows unsigned multiplication of the contents
of the accumulator (A) and the index register (X). The high-order product is then stored in the index
register and the low-order product is stored in the accumulator. A detailed definition of the MUL
instruction is shown in Table 8-1.
TPG
55
05SR3.Book Page 3 Thursday, August 4, 2005 1:08 PM
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