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参数资料
型号： MC68HC912BL16FU8
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封装： QFP-64
文件页数： 113/128页
文件大小： 3326K
代理商： MC68HC912BL16FU8
MC68HC912BL16TS/D
85
If the pulse accumulator is disabled (PAEN = 0), the prescaler clock from the timer is always used as
an input clock to the timer counter. The change from one selected clock to the other happens immedi-
ately after these bits are written.
PAOVI — Pulse Accumulator Overflow Interrupt Enable
0 = Interrupt inhibited
1 = Interrupt requested if PAOVF is set
PAI — Pulse Accumulator Input Interrupt Enable
0 = Interrupt inhibited
1 = Interrupt requested if PAIF is set
Read or write anytime.
When TFFCA bit in the TSCR register is set, any access to the PACNT register will clear all the flags in
the PAFLG register.
PAOVF — Pulse Accumulator Overflow Flag
Set when the 16-bit pulse accumulator overflows from $FFFF to $0000. This bit is cleared automatically
by a write to the PAFLG register with bit 1 set.
PAIF — Pulse Accumulator Input Edge Flag
Set when the selected edge is detected at the pulse accumulator input pin. In event mode, the event
edge triggers PAIF. In gated time accumulation mode, the trailing edge of the gate signal at the pulse
accumulator input pin triggers PAIF. This bit is cleared automatically by a write to the PAFLG register
with bit 0 set.
Full count register access should take place in one clock cycle. A separate read/write for high byte and
low byte will give a different result than accessing them as a word.
Read or write anytime.
Read anytime. Write only in special mode (SMODN = 0)
TCBYP — Timer Divider Chain Bypass
0 = Normal operation
1 = The 16-bit free-running timer counter is divided into two 8-bit halves and the prescaler is by-
passed. The clock drives both halves directly.
PCBYP — Pulse Accumulator Divider Chain Bypass
PAFLG — Pulse Accumulator Flag Register
$00A1
Bit 7
6
5
4
3
2
1
Bit 0
0
PAOVF
PAIF
RESET:
0
PACNT — 16-Bit Pulse Accumulator Count Register
$00A2–$00A3
Bit 7
6
5
4
3
2
1
Bit 0
Bit 15
14
13
12
11
10
9
Bit 8
Bit 7
6
5
4
3
2
1
Bit 0
RESET:
0
TIMTST — Timer Test Register
$00AD
Bit 7
6
5
4
3
2
1
Bit 0
0
TCBYP
PCBYP
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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