参数资料
型号: MC9328MX21CVK
厂商: Freescale Semiconductor
文件页数: 5/100页
文件大小: 0K
描述: IC MCU I.MX21 266MHZ 289-MAPBGA
标准包装: 152
系列: i.MX21
核心处理器: ARM9
芯体尺寸: 32-位
速度: 266MHz
连通性: 1 线,EBI/EMI,I²C,IrDA,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外围设备: DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 192
程序存储器类型: ROMless
电压 - 电源 (Vcc/Vdd): 1.45 V ~ 3.3 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 289-LFBGA
包装: 托盘
MC9328MX21 Technical Data, Rev. 3.4
12
Freescale Semiconductor
Signal Descriptions
USBH2_FS
USB Host2 Full Speed output signal. This signal is multiplexed with CSPI2_SS[0] of CSPI2.
USBG_SCL
USB OTG I2C Clock input/output signal. This signal is multiplexed with SLCDC1_DAT8.
USBG_SDA
USB OTG I2C Data input/output signal. This signal is multiplexed with SLCDC1_DAT7.
USBG_TXR_INT
USB OTG transceiver interrupt input. Multiplexed with USBG_FS.
Secure Digital Interface
SD1_CMD
SD Command bidirectional signal—If the system designer does not want to make use of the internal pull-
up, via the Pull-up enable register, a 4.7k–69k external pull-up resistor must be added. This signal is
multiplexed with CSPI3_MOSI.
SD1_CLK
SD Output Clock. This signal is multiplexed with CSPI3_SCLK.
SD1_D[3:0]
SD Data bidirectional signals—If the system designer does not want to make use of the internal pull-up,
via the Pull-up enable register, a 50k–69k external pull-up resistor must be added. SD1_D[3] is muxed
with CSPI3_SS while SD1_D[0] is muxed with CSPI3_MISO.
SD2_CMD
SD Command bidirectional signal. This signal is multiplexed with SLCDC1_CS signal from SLCDC1.
SD2_CLK
SD Output Clock signal. This signal is multiplexed with SLCDC1_CLK signal from SLCDC1.
SD2_D[3:0]
SD Data bidirectional signals. SD2_D[3:2] are multiplexed with SLCDC1_RS and SLCDC_D0 signals
from SLCDC1.
UARTs – IrDA/Auto-Bauding
UART1_RXD
Receive Data input signal
UART1_TXD
Transmit Data output signal
UART1_RTS
Request to Send input signal
UART1_CTS
Clear to Send output signal
UART2_RXD
Receive Data input signal. This signal is multiplexed with KP_ROW6 signal from KPP.
UART2_TXD
Transmit Data output signal. This signal is multiplexed with KP_COL6 signal from KPP.
UART2_RTS
Request to Send input signal. This signal is multiplexed with KP_ROW7 signal from KPP.
UART2_CTS
Clear to Send output signal. This signal is multiplexed with KP_COL7 signal from KPP.
UART3_RXD
Receive Data input signal. This signal is multiplexed with IR_RXD from FIRI.
UART3_TXD
Transmit Data output signal. This signal is multiplexed with IR_TXD from FIRI.
UART3_RTS
Request to Send input signal
UART3_CTS
Clear to Send output signal
UART4_RXD
Receive Data input signal which is multiplexed with USBH1_RXDP and USBH1_TXDP.
UART4_TXD
Transmit Data output signal which is multiplexed with USBH1_TXDM.
UART4_RTS
Request to Send input signal which is multiplexed with USBH1_FS and USBH1_RXDP.
UART4_CTS
Clear to Send output signal which is multiplexed with USBH1_TXDP and USBH1_RXDM.
Serial Audio Port – SSI (configurable to I2S protocol and AC97)
SSI1_CLK
Serial clock signal which is output in master or input in slave
SSI1_TXD
Transmit serial data
SSI1_RXD
Receive serial data
SSI1_FS
Frame Sync signal which is output in master and input in slave
Table 2. i.MX21 Signal Descriptions (Continued)
Signal Name
Function/Notes
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MC9328MX21CVK 制造商:Freescale Semiconductor 功能描述:Microcontroller
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