参数资料
型号: MC9328MXLVH15
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
封装: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件页数: 40/89页
文件大小: 1869K
代理商: MC9328MXLVH15
Specifications
MOTOROLA
MC9328MXL Advance Information
45
3.9 SPI Timing Diagrams
To utilize the internal transmit (TX) and receive (RX) data FIFOs when the SPI 1 module is configured as
a master, two control signals are used for data transfer rate control: the SS signal (output) and the
SPI_RDY signal (input). The SPI 1 Sample Period Control Register (PERIODREG1) and the SPI 2
Sample Period Control Register (PERIODREG2) can also be programmed to a fixed data transfer rate for
either SPI 1 or SPI 2. When the SPI 1 module is configured as a slave, the user can configure the SPI 1
Control Register (CONTROLREG1) to match the external SPI master’s timing. In this configuration, SS
becomes an input signal, and is used to latch data into or load data out to the internal data shift registers, as
well as to increment the data FIFO. Figure 31 through Figure 35 show the timing relationship of the master
SPI using different triggering mechanisms.
.
Figure 31. Master SPI Timing Diagram Using SPI_RDY Edge Trigger
Figure 32. Master SPI Timing Diagram Using SPI_RDY Level Trigger
Figure 33. Master SPI Timing Diagram Ignore SPI_RDY Level Trigger
Figure 34. Slave SPI Timing Diagram FIFO Advanced by BIT COUNT
1
2
3
5
4
SS
SPIRDY
SCLK, MOSI, MISO
SS
SPIRDY
SCLK, MOSI, MISO
SS (output)
SS (input)
SCLK, MOSI, MISO
相关PDF资料
PDF描述
MC9328MXLDVP15 150 MHz, RISC PROCESSOR, PBGA225
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相关代理商/技术参数
参数描述
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MC9328MXLVH20R2 制造商:Rochester Electronics LLC 功能描述:DRAGONBALL CORSICA - Bulk 制造商:Motorola Inc 功能描述:
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