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参数资料
| 型号： | MC9328MXLVH15 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256 |
| 封装： | 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256 |
| 文件页数： | 45/89页 |
| 文件大小： | 1869K |
| 代理商： | MC9328MXLVH15 |
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Signals and Connections
MOTOROLA
MC9328MXL Advance Information
5
EB1
Byte Strobe—Active low external enable byte signal that controls D [23:16].
EB2
Byte Strobe—Active low external enable byte signal that controls D [15:8].
EB3
LSB Byte Strobe—Active low external enable byte signal that controls D [7:0].
OE
Memory Output Enable—Active low output enables external data bus.
CS [5:0]
Chip-Select—The chip-select signals CS [3:2] are multiplexed with CSD [1:0] and are
selected by the Function Multiplexing Control Register (FMCR). By default CSD [1:0] is
selected.
ECB
Active low input signal sent by a flash device to the EIM whenever the flash device must
terminate an on-going burst sequence and initiate a new (long first access) burst
sequence.
LBA
Active low signal sent by a flash device causing the external burst device to latch the
starting burst address.
BCLK
Clock signal sent to external synchronous memories (such as burst flash) during burst
mode.
RW
RW signal—Indicates whether external access is a read (high) or write (low) cycle. Used
as a WE input signal by external DRAM.
DTACK
DTACK signal— The external input data acknowledge signal. When using the external
DTACK signal as a data acknowledge signal, the bus time-out monitor generates a bus
error when a bus cycle is not terminated by the external DTACK signal after 1022 clock
counts have elapsed.
Bootstrap
BOOT [3:0]
System Boot Mode Select—The operational system boot mode of the MC9328MXL upon
system reset is determined by the settings of these pins.
SDRAM Controller
SDBA [4:0]
SDRAM/SyncFlash non-interleave mode bank address multiplexed with address signals
A [15:11]. These signals are logically equivalent to core address p_addr [25:21] in
SDRAM/SyncFlash cycles.
SDIBA [3:0]
SDRAM/SyncFlash interleave addressing mode bank address multiplexed with address
signals A [19:16]. These signals are logically equivalent to core address p_addr [12:9] in
SDRAM/SyncFlash cycles.
MA [11:10]
SDRAM address signals
MA [9:0]
SDRAM address signals which are multiplexed with address signals A [10:1]. MA [9:0]
are selected on SDRAM/SyncFlash cycles.
DQM [3:0]
SDRAM data enable
CSD0
SDRAM/SyncFlash Chip-select signal which is multiplexed with the CS2 signal. These
two signals are selectable by programming the system control register.
CSD1
SDRAM/SyncFlash Chip-select signal which is multiplexed with CS3 signal. These two
signals are selectable by programming the system control register. By default, CSD1 is
selected, so it can be used as SyncFlash boot chip-select by properly configuring BOOT
[3:0] input pins.
RAS
SDRAM/SyncFlash Row Address Select signal
Table 2. MC9328MXL Signal Descriptions (Continued)
Signal Name
Function/Notes
相关PDF资料 |
PDF描述 |
|---|---|
| MC9328MXLDVP15 | 150 MHz, RISC PROCESSOR, PBGA225 |
| MC9328MXLDVF15 | 150 MHz, RISC PROCESSOR, PBGA225 |
| MC9328MXLVF15 | 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225 |
| MC9328MXLVH20 | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA256 |
| MC9328MXLDVM20 | 200 MHz, RISC PROCESSOR, PBGA256 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC9328MXLVH20 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MXLVH20R2 | 制造商:Rochester Electronics LLC 功能描述:DRAGONBALL CORSICA - Bulk 制造商:Motorola Inc 功能描述: |
| MC9328MXLVM15 | 功能描述:处理器 - 专门应用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432 |
| MC9328MXLVM15R2 | 功能描述:处理器 - 专门应用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432 |
| MC9328MXLVM20 | 功能描述:处理器 - 专门应用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432 |
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