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参数资料
型号： MCIMX31VMN5CR2
厂商： Freescale Semiconductor
文件页数： 23/122页
文件大小： 0K
描述： IC MPU MAP I.MX31L 473-MAPBGA
标准包装： 750
系列： i.MX31
核心处理器： ARM11
芯体尺寸： 32-位
速度： 532MHz
连通性： 1 线，ATA，EBI/EMI，FIR，I²C，MMC/SD，PCMCIA，SIM，SPI，SSI，UART/USART，USB，USB OTG
外围设备： DMA，LCD，POR，PWM，WDT
程序存储器类型： ROMless
RAM 容量： 16K x 8
电压 - 电源 (Vcc/Vdd)： 1.22 V ~ 3.3 V
振荡器型： 外部
工作温度： 0°C ~ 70°C
封装/外壳： 473-LFBGA
包装： 带卷 (TR)
Product Differences
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Freescale Semiconductor
119
6
Product Differences
The locations that provide the differences between silicon Revision 2.0, 1.2, and previous versions are
given in Table 72. The differences between the MCIMX31/MCIMX31L and the
MCIMX31C/MCIMX31LC are outlined in Table 73.
Table 72. Silicon Differentiation by Location within the Data Sheet
Item
Location
Silicon 1.2 and Previous
Silicon 2.0
Ordering Information Section 1.2, “Ordering Information
Table 1
Feature Differences
Table 1.2.1, "Feature Differences
Between Mask Sets," on page 3
N/A
Table 1.2.1
Operating Ranges
Table 4.1, "Chip-Level Conditions,"
on page 10
Table 8, "Operating Ranges," on
page 13
Table 8, and Table 9, "Specific
Operating Ranges for Silicon
Revision 2.0," on page 14
Power-up
Sequences
Section 4.2.1, “Powering Up
Figure 2, "Power-Up Sequence
for Silicon Revisions 1.2 and
Previous," on page 20
Figure 3, "Option 1 Power-Up
Sequence (Silicon Revision
2.0)," on page 21
Power-down
Sequences
Section 4.2.2, “Powering Down
——
Table 73. Product Differentiation
Item
Location
MCIMX31/MCIMX31L
MCIMX31C/MCIMX31LC
Device ordering
information
Table 1, "Ordering Information," on
page 3
See Table 1.See Table 1.
Thermal simulation
values
Table 6, "Thermal Resistance
Data—14
× 14 mm Package," on
page 11 and Table 7, "Thermal
Resistance Data—19
× 19 mm
Package," on page 11
See Table 6 and Table 7.See Table 7.
Core overdrive
operating voltages
Table 8, "Operating Ranges," on
page 13
Capability to operate in overdrive
voltages.
Not capable of overdrive
operating voltages.
Fuse_VDD
Table 8, "Operating Ranges," on
page 13 and Table 9, "Specific
Operating Ranges for Silicon
Revision 2.0," on page 14
Fusebox read Supply Voltage
1.65 min, 1.95 max.
In read mode, FUSE_VDD
should be floated.
Ambient operating
temperature range
Table 13, "Current Consumption for
–40×C to 85×C, for Silicon Revision
2.0," on page 17, and Table 14,
"Current Consumption for 0×C to
70×C, for Silicon Revision 2.0," on
page 18
0
°C min, 70°C max
–40
°C min, 85°C max
–40
°C min, 85°C max
Current consumption
values
Table 13, "Current Consumption for
–40×C to 85×C, for Silicon Revision
2.0," on page 17
Typical value changes for State
Retention, Doze, and Wait. See
Table.
Typical value changes for State
Retention, Doze, and Wait. See
Table.
DPLL maximum
output freq range
Table 31, "DPLL Specifications," on
page 37
MPLL and SPLL = 532 MHz
MPLL and SPLL = 400 MHz
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family
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