参数资料
型号: MCIMX31VMN5CR2
厂商: Freescale Semiconductor
文件页数: 42/122页
文件大小: 0K
描述: IC MPU MAP I.MX31L 473-MAPBGA
标准包装: 750
系列: i.MX31
核心处理器: ARM11
芯体尺寸: 32-位
速度: 532MHz
连通性: 1 线,ATA,EBI/EMI,FIR,I²C,MMC/SD,PCMCIA,SIM,SPI,SSI,UART/USART,USB,USB OTG
外围设备: DMA,LCD,POR,PWM,WDT
程序存储器类型: ROMless
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.22 V ~ 3.3 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 473-LFBGA
包装: 带卷 (TR)
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
26
Freescale Semiconductor
Electrical Characteristics
4.3.4
1-Wire Electrical Specifications
Figure 7 depicts the RPP timing, and Table 21 lists the RPP timing parameters.
Figure 7. Reset and Presence Pulses (RPP) Timing Diagram
Figure 8 depicts Write 0 Sequence timing, and Table 22 lists the timing parameters.
Figure 8. Write 0 Sequence Timing Diagram
Figure 9 depicts Write 1 Sequence timing, Figure 10 depicts the Read Sequence timing, and Table 23 lists
the timing parameters.
Table 21. RPP Sequence Delay Comparisons Timing Parameters
ID
Parameters
Symbol
Min
Typ
Max
Units
OW1
Reset Time Low
tRSTL
480
511
s
OW2
Presence Detect High
tPDH
15
60
s
OW3
Presence Detect Low
tPDL
60
240
s
OW4
Reset Time High
tRSTH
480
512
s
Table 22. WR0 Sequence Timing Parameters
ID
Parameter
Symbol
Min
Typ
Max
Units
OW5
Write 0 Low Time
tWR0_low
60
100
120
s
OW6
Transmission Time Slot
tSLOT
OW5
117
120
s
1-Wire bus
DS2502 Tx
“Presence Pulse”
(BATT_LINE)
OWIRE Tx
“Reset Pulse”
OW1
OW2
OW3
OW4
OW5
OW6
1-Wire bus
(BATT_LINE)
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family
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