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参数资料
| 型号： | MD7IC18120GNR1 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 3/18页 |
| 文件大小： | 0K |
| 描述： | IC PWR AMP RF LDMOS TO270-16 |
| 标准包装： | 500 |
| 频率： | 1.805GHz ~ 1.88GHz |
| P1dB： | 50.8dBm（120W） |
| 增益： | 25.8dB |
| RF 型： | W-CDMA |
| 电源电压： | 28V |
| 测试频率： | 1.88GHz |
| 封装/外壳： | TO-270-16 变型，鸥翼 |
| 包装： | 带卷 (TR) |
Table 5. Electrical Characteristics (T A = 25 ° C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Stage 1 — Off Characteristics (1)
Zero Gate Voltage Drain Leakage Current
(V DS = 65 Vdc, V GS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V DS = 28 Vdc, V GS = 0 Vdc)
Gate--Source Leakage Current
(V GS = 1.5 Vdc, V DS = 0 Vdc)
I DSS
I DSS
I GSS
—
—
—
—
—
—
10
1
1
μ Adc
μ Adc
μ Adc
Stage 1 — On Characteristics (1)
Gate Threshold Voltage
(V DS = 10 Vdc, I D = 28 μ Adc)
Gate Quiescent Voltage
(V DS = 28 Vdc, I DQ1A = 70 mA, I DQ1B = 160 mA)
V GS(th)
V GS(Q)
1.2
—
2.0
2.9
2.7
—
Vdc
Vdc
Fixture Gate Quiescent Voltage
(V DD = 28 Vdc, Measured in Functional Test)
I DQ1A = 70 mA
I DQ1B = 160 mA
V GG(Q)
4.0
7.1
5.0
8.1
6.0
9.1
Vdc
Stage 2 — Off Characteristics (1)
Zero Gate Voltage Drain Leakage Current
(V DS = 65 Vdc, V GS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V DS = 28 Vdc, V GS = 0 Vdc)
Gate--Source Leakage Current
(V GS = 1.5 Vdc, V DS = 0 Vdc)
I DSS
I DSS
I GSS
—
—
—
—
—
—
10
1
1
μ Adc
μ Adc
μ Adc
Stage 2 — On Characteristics (1)
Gate Threshold Voltage
(V DS = 10 Vdc, I D = 185 μ Adc)
Gate Quiescent Voltage
(V DS = 28 Vdc, I DQ2B = 500 mA)
Fixture Gate Quiescent Voltage
(V DD = 28 Vdc, I DQ2B = 500 mA, Measured in Functional Test)
Drain--Source On--Voltage
(V GS = 10 Vdc, I D = 1.8 Adc)
V GS(th)
V GS(Q)
V GG(Q)
V DS(on)
1.2
—
5.3
—
2.0
2.6
6.3
0.35
2.7
—
7.3
—
Vdc
Vdc
Vdc
Vdc
Functional Tests (2,3,4) (In Freescale Test Fixture, 50 ohm system) V DD = 28 Vdc, I DQ1A = 70 mA, I DQ1B = 160 mA, I DQ2B = 500 mA, V GS2A =
1.7 Vdc, P out = 30 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability
on CCDF.
Power Gain
Power Added Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
G ps
PAE
PAR
24.0
33.0
6.0
25.8
35.3
6.7
28.0
—
—
dB
%
dB
1.
2.
3.
4.
Each side of device measured separately.
Part internally matched both on input and output.
Measurement made with device in a Symmetrical Doherty configuration.
Measurement made with device in straight lead configuration before any lead forming operation is applied.
(continued)
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
3
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