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| 型号： | MK10N512VMD100 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144 |
| 封装： | 13 X 13 MM, MAPBGA-144 |
| 文件页数： | 32/59页 |
| 文件大小： | 1671K |
| 代理商： | MK10N512VMD100 |
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Table 21. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
ENOB
Effective number
of bits
Gain=1, Average=4
Gain=1, Average=8
Gain=64, Average=4
Gain=64, Average=8
Gain=1, Average=32
Gain=2, Average=32
Gain=4, Average=32
Gain=8, Average=32
Gain=16, Average=32
Gain=32, Average=32
Gain=64, Average=32
TBD
12.3
12.7
8.4
8.7
13.3
13.1
12.5
11.8
11.1
10.2
9.3
—
bits
16-bit differen‐
tial mode,
fin=500Hz
SINAD
Signal-to-noise
plus distortion ra‐
tio
See ENOB
6.02 × ENOB + 1.76
dB
1. Typical values assume VDDA =3.0V, Temp=25°C, fADCK=6MHz unless otherwise stated.
2. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
function if input common mode voltage (VCM) and the PGA gain.
3. This is the input leakage current of the module in addition to the PAD leakage current.
4. Gain = 2PGAG
5. When the PGA gain is changed, it takes some time to settle the output for the ADC to work properly. During a gain
switching, a few ADC outputs should be discarded (minimum two data samples, may be more depending on ADC
sampling rate and time of the switching).
6. Limit the input signal swing so that the PGA does not saturate during operation. Input signal swing is dependent on the
PGA reference voltage and gain setting.
6.6.2 12-bit DAC electrical characteristics
6.6.2.1 12-bit DAC operating requirements
Table 22. 12-bit DAC operating requirements
Symbol
Desciption
Min.
Max.
Unit
Notes
VDDA
Supply voltage
1.71
3.6
V
VDACR
Reference voltage
1.13
3.6
V
TA
Temperature
40
105
°C
CL
Output load capacitance
—
100
pF
IL
Output load current
—
1
mA
1. The DAC reference can be selected to be VDDA or the voltage output of the VREF module (VREFO)
2. A small load capacitance (47 pF) can improve the bandwidth performance of the DAC
Peripheral operating requirements and behaviors
K10 Sub-Family Product Preview Data Sheet, Rev. 2, 3/2011.
38
Preliminary
Freescale Semiconductor, Inc.
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相关代理商/技术参数 |
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| MK10N512VMD100R | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
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| MK10N512VMD120R | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
| MK10N512VMD150 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
| MK10N512VMD150R | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
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