参数资料
型号: MK10N512VMD100
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
封装: 13 X 13 MM, MAPBGA-144
文件页数: 39/59页
文件大小: 1671K
代理商: MK10N512VMD100
Table 29. Slave Mode DSPI Timing (Low-speed Mode)
Num
Description
Min.
Max.
Unit
Operating voltage
1.71
3.6
V
Frequency of operation
6.25
MHz
DS9
DSPI_SCK input cycle time
8 x tBCLK
ns
DS10
DSPI_SCK input high/low time
(tSCK/2) - 4
(tSCK/2) + 4
ns
DS11
DSPI_SCK to DSPI_SOUT valid
20
ns
DS12
DSPI_SCK to DSPI_SOUT invalid
0
ns
DS13
DSPI_SIN to DSPI_SCK input setup
5
ns
DS14
DSPI_SCK to DSIP_SIN input hold
15
ns
DS15
DSPI_SS active to DSPI_SOUT driven
15
ns
DS16
DSPI_SS inactive to DSPI_SOUT not driven
15
ns
First data
Last data
First data
Data
Last data
Data
DS15
DS10
DS9
DS16
DS11
DS12
DS14
DS13
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Figure 20. DSPI Classic SPI Timing — Slave Mode
6.8.3 DSPI Switching Specifications (High-speed mode)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provide DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Table 30. Master Mode DSPI Timing (High-speed mode)
Num
Description
Min.
Max.
Unit
Operating voltage
2.7
3.6
V
Frequency of operation
25
MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
K10 Sub-Family Product Preview Data Sheet, Rev. 2, 3/2011.
44
Preliminary
Freescale Semiconductor, Inc.
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