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参数资料
| 型号： | MM908E626AVEK |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 32 MHz, MICROCONTROLLER, PDSO54 |
| 封装： | 5.10 X 10.30 MM, 0.65 MM PITCH, LEAD FREE, SOIC-54 |
| 文件页数： | 17/43页 |
| 文件大小： | 842K |
| 代理商： | MM908E626AVEK |
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Analog Integrated Circuit Device Data
24
Freescale Semiconductor
908E626
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
RXD Pin
The RXD transceiver pin is the MCU interface, which
reports the state of the LIN bus voltage. LIN HIGH (recessive
state) is reported by a high level on RXD, LIN LOW (dominant
state) by a low level on RXD.
STOP Mode/Wake-up Feature
During STOP mode operation the transmitter of the
physical layer is disabled. The receiver pin is still active and
able to detect wake-up events on the LIN bus line.If LIN
interrupt is enabled (LINIE bit in the Interrupt Mask Register
is set), a falling edge on the LIN line causes an interrupt. This
interrupt switches on the main voltage regulator and
generates a system wake-up.
Analog Multiplexer/ADOUT Pin
The ADOUT pin is the analog output interface to the ADC
of the MCU (see Figure , page 2). An analog multiplexer is
used to read six internal diagnostic analog voltages.
Current Recopy
The analog multiplexer is connected to the four low side
current sense circuits of the half-bridges. These sense
circuits offer a voltage proportional to the current through the
low side MOSFET. High or low resolution is selectable: 5.0 V/
2.5 A or 5.0 V/500 mA, respectively. (Refer to Half-bridge
Temperature Sensor
The 908E626 includes an on-chip temperature sensor.
This sensor offers a voltage that is proportional to the actual
chip junction temperature.
VSUP Prescaler
The VSUP prescaler permits the reading or measurement
of the external supply voltage. The output of this voltage is
VSUP/RATIOVSUP.
The different internal diagnostic analog voltages can be
selected with the ADMUX Register.
Analog Multiplexer Configuration Register (ADMUX)
SS3, SS2, SS1, and SS0—A/D Input Select Bits
These read/write bits select the input to the ADC in the
SS3, SS2, SS1, and SS0 bits.
Power Output Register (POUT)
HVDDON—HVDD On Bit
This read/write bit enables HVDD output. Reset clears the
HVDDON bit.
1 = HVDD enabled.
0 = HVDD disabled.
Register Name and Address: ADMUX - $07
Bit7
6
5
4
3
2
1
Bit0
Read
0
SS3
SS2
SS1
SS0
Write
Reset
0
Table 7. Analog Multiplexer Configuration Register
SS3
SS2
SS1
SS0
Channel
0000
Current Recopy HB1
0001
Current Recopy HB2
0010
Current Recopy HB3
0011
Current Recopy HB4
0100
VSUP Prescaler
0101
Temperature Sensor
0110
Not Used
0111
1000
1001
1010
1011
1100
1101
1110
1111
Register Name and Address: POUT - $0b
Bit7 6
5
4
3
2
1
Bit0
Read
0
0
0
0
HVDD
ON
0
Write
Reset
0
Notes
17.
This bit must always be set to 0.
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