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参数资料
| 型号： | MPC8240LZU200X |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352 |
| 封装： | 35 X 35 MM, 1.65 MM HEIGHT, 1.27 MM PITCH, TBGA-352 |
| 文件页数： | 58/58页 |
| 文件大小： | 596K |
| 代理商： | MPC8240LZU200X |
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MPC8240 Integrated Processor Hardware Specications
9
Electrical and Thermal Characteristics
1.4.1.4 Output Driver Characteristics
Table 4 provides information on the characteristics of the output drivers referenced in Table 17. The values
are from the MPC8240 IBIS model (v1.1 IBIS, v1.2 le) and are not tested, for additional detailed
information see the complete IBIS model listing at: http://www.mot.com/SPS/PowerPC/teksupport/tools/
IBIS/kahlua_1.ibs.txt
Notes:
1
For DRV_PCI, IOH read from the IBIS listing in the pull-up mode, I(Min) column, at the 0.33V label by
interpolating between the 0.3 V and 0.4 V table entries’ current values which corresponds to the PCI VOH
= 2.97 = 0.9*OVdd (OVdd = 3.3 V) where table entry voltage = OVdd - PCI VOH.
2
For all others with GVdd or OVdd = 3.3 V, IOH read from the IBIS listing in the pull-up mode, I(Min) col-
umn, at the 0.9 V table entry which corresponds to the VOH = 2.4 V where table entry voltage =
GVdd/OVdd - VOH.
3
For DRV_PCI, IOL read from the IBIS listing in the pull-down mode, I(Min) column, at 0.33 V = PCI VOL =
0.1*OVdd (OVdd = 3.3 V) by interpolating between the 0.3 V and 0.4 V table entries.
4
For all others with GVdd or OVdd = 3.3 V, IOL read from the IBIS listing in the pull-down mode, I(Min) col-
umn, at the 0.4 V table entry.
Notes:
1
See Table 17 for pins with internal pull-up resistors.
2
See Table 4. for the typical drive capability of a specic signal pin based upon the type of output
driver associated with that pin as listed in Table 17..
3
These specications are for the default driver strengths indicated in Table 4.
4
Leakage current is measured on input pins and on output pins in the high impedance state. The leak-
age current is measured for nominal OVdd/LVdd and Vdd or both Ovdd/LVdd and Vdd must vary in
the same direction.
5
The minimum input high voltage is not compliant with the PCI Local Bus Specication (Rev 2.1) which
species 0.5*OVdd for minimum input high voltage.
Table 4. Drive Capability of MPC8240 Output Pins
Driver Type
Programmable
Output
Impedance (Ohms)
Supply
Voltage
IOH
IOL
Units
Notes
DRV_STD
20
OVdd = 3.3V
36.7
30.0
mA
2, 4
40 (default)
OVdd = 3.3V
18.7
15.0
mA
2, 4
DRV_PCI
25
OVdd = 3.3V
11.0
20.6
mA
1, 3
50 (default)
OVdd = 3.3V
5.6
10.3
mA
1, 3
DRV_MEM_ADDR
DRV_PCI_CLK
8 (default)
GVdd = 3.3V
89.0
76.3
mA
2, 4
13.3
GVdd = 3.3V
55.9
46.4
mA
2, 4
20
GVdd = 3.3V
36.7
30.0
mA
2, 4
40
GVdd = 3.3V
18.7
15.0
mA
2, 4
DRV_MEM_DATA
20 (default)
GVdd = 3.3V
36.7
30.0
mA
2, 4
40
GVdd = 3.3V
18.7
15.0
mA
2, 4
Table 3. DC Electrical Specifications (Continued)
At recommended operating conditions (see Table 2)
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