参数资料
型号: MPC8308VMAFD
厂商: Freescale Semiconductor
文件页数: 15/83页
文件大小: 0K
描述: MPU POWERQUICC II PRO 473MAPBGA
产品培训模块: MPC8308 PowerQUICC II Pro Processor
特色产品: MPC8308 PowerQUICC? II Pro Processor
标准包装: 84
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 333MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 473-LFBGA
供应商设备封装: 473-MAPBGA(19x19)
包装: 托盘
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
22
Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
This figure shows the MII management AC timing diagram.
Figure 12. MII Management Interface Timing Diagram
8.4
IEEE Std 1588 Timer Specifications
This section describes the DC and AC electrical specifications for the 1588 timer.
8.4.1
IEEE 1588 Timer DC Specifications
This table provides the IEEE 1588 timer DC specifications.
MDC fall time
tMDHF
——
10
ns
Notes:
1. The symbols used for timing specifications Follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMDKHDX symbolizes management
data timing (MD) for the time tMDC from clock reference (K) high (H) until data outputs (D) are invalid (X) or data hold time.
Also, tMDDVKH symbolizes management data timing (MD) with respect to the time data input signals (D) reach the valid state
(V) relative to the tMDC clock reference (K) going to the high (H) state or setup time. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
2. This parameter is dependent on the csb_clk speed. (The MIIMCFG[Mgmt Clock Select] field determines the clock frequency
of the Mgmt Clock EC_MDC.)
3. This parameter is dependent on the cbs_clk speed (that is, for a csb_clk of 133 MHz, the delay is 60 ns).
Table 28. GPIO DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –8.0 mA
2.4
V
Output low voltage
VOL
IOL = 8.0 mA
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
0.4
V
Input high voltage
VIH
2.0
NVDD + 0.3
V
Table 27. MII Management AC Timing Specifications (continued)
At recommended operating conditions with LVDDA/LVDDB is 3.3 V ± 0.3V
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
Notes
MDC
tMDDXKH
tMDC
tMDCH
tMDCR
tMDCF
tMDDVKH
tMDKHDX
MDIO
(Input)
(Output)
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