参数资料
型号: MPC8314VRAGDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: MICROPROCESSOR, PBGA620
封装: 29 X 29 MM, LEAD FREE, PLASTIC, TEPBGA-620
文件页数: 97/106页
文件大小: 1253K
代理商: MPC8314VRAGDA
MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 0
90
Freescale Semiconductor
Package and Pin Listings
XPADVSS
P5, P9, V3
I
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 k
Ω) should be placed on this pin to NVDD.
2. This pin is an open drain signal. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to NVDD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.
6. This pin must always be tied to VSS.
7. Thermal sensitive resistor.
8. This pin should be
connected to USB_VSSA_BIAS through 10K precision resistor.
9. The LB_POR_CFG_BOOT_ECC functionality for this pin is only available in MPC8314E revision 1.1. The
LB_POR_CFG_BOOT_ECC is sampled only during the PORESET negation. This pin with an internal pull down resistor
enables the ECC by default. To disable the ECC an external strong pull up resistor or a tri-state buffer is needed.
Table 66. MPC8314E TEPBGA II Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
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