参数资料
型号: MPC8315ECVRAFDA
厂商: Freescale Semiconductor
文件页数: 6/106页
文件大小: 0K
描述: MPU POWERQUICC II PRO 620-PBGA
标准包装: 36
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 333MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 620-BBGA 裸露焊盘
供应商设备封装: 620-PBGA(29x29)
包装: 托盘
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
103
Ordering Information
This table summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal NVDD, 105
C.
26.6
Configuration Pin Multiplexing
The MPC8315E provides the user with power-on configuration options that can be set through the use of
external pull-up or pull-down resistors of 4.7 k
on certain output pins (see customer visible configuration
pins). These pins are generally used as output only pins in normal operation.
While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins
while HRESET is asserted, is latched when PORESET deasserts, at which time the input receiver is
disabled and the I/O circuit takes on its normal function. Careful board layout with stubless connections
to these pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should
minimize the disruption of signal quality or speed for output pins thus configured.
26.7
Pull-Up Resistor Requirements
The MPC8315E requires high resistance pull-up resistors (10 k
is recommended) on open drain type pins
including I2C pins and EPIC interrupt pins.
For more information on required pull up resistors and the connections required for JTAG interface, see
AN3438, MPC8315 Design Checklist
27
Ordering Information
Ordering information for the parts fully covered by this specification document is provided in
27.1
Part Numbers Fully Addressed by this Document
This table provides the Freescale part numbering nomenclature for the MPC8315E. Note that the
individual part numbers correspond to a maximum processor core frequency. For available frequencies,
contact your local Freescale sales office. In addition to the processor frequency, the part numbering scheme
Table 80. Impedance Characteristics
Impedance
Local Bus, Ethernet,
DUART, Control,
Configuration, Power
Management
PCI Signals
(not including PCI
Output Clocks)
PCI Output Clocks
(including
PCI_SYNC_OUT)
DDR DRAM
Symbol
Unit
RN
42 Target
25 Target
42 Target
20 Target
Z0
RP
42 Target
25 Target
42 Target
20 Target
Z0
Differential
NA
ZDIFF
Note: Nominal supply voltages. See Table 1, Tj = 105C.
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