参数资料
型号: MPC8349EZUAJF
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 533 MHz, RISC PROCESSOR, PBGA672
封装: 35 X 35 MM, 1.50 MM HEIGHT, 1 MM PITCH, TBGA-672
文件页数: 33/115页
文件大小: 1228K
代理商: MPC8349EZUAJF
MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 5
24
Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
Figure 5 shows the GMII transmit AC timing diagram.
Figure 5. GMII Transmit AC Timing Diagram
7.2.1.2
GMII Receive AC Timing Specifications
Table 19 provides the GMII receive AC timing specifications.
GTX_CLK125 clock period
tG125
2
—8.0
ns
GTX_CLK125 reference clock duty cycle measured at
LVDD/ 2
tG125H/tG125
45
55
%
Notes:
1. The symbols used for timing specifications herein follow the pattern t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example,
tGTKHDV symbolizes GMII transmit timing (GT) with respect to the tGTX clock reference (K) going to the high state
(H) relative to the time date input signals (D) reaching the valid state (V) to state or setup time. Also, tGTKHDX
symbolizes GMII transmit timing (GT) with respect to the tGTX clock reference (K) going to the high state (H) relative
to the time date input signals (D) going invalid (X) or hold time. Note that, in general, the clock reference symbol
representation is based on three letters representing the clock of a particular functional. For example, the subscript
of tGTX represents the GMII(G) transmit (TX) clock. For rise and fall times, the latter convention is used with the
appropriate letter: R (rise) or F (fall).
2. This symbol is used to represent the external GTX_CLK125 signal and does not follow the original symbol naming
convention.
Table 19. GMII Receive AC Timing Specifications
At recommended operating conditions with LVDD / OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
RX_CLK clock period
tGRX
—8.0
ns
RX_CLK duty cycle
tGRXH/tGRX
40
60
%
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
tGRDVKH
2.0
ns
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
tGRDXKH
0.5
ns
Table 18. GMII Transmit AC Timing Specifications (continued)
At recommended operating conditions with LVDD / OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
GTX_CLK
TXD[7:0]
tGTKHDX
tGTX
tGTXH
tGTXR
tGTXF
TX_EN
TX_ER
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