参数资料
型号: MPC8377VRALG
厂商: Freescale Semiconductor
文件页数: 35/127页
文件大小: 0K
描述: MPU POWERQUICC II PRO 689-PBGA
标准包装: 27
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 667MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 689-BBGA 裸露焊盘
供应商设备封装: 689-TEPBGA II(31x31)
包装: 托盘
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
15
4.3
eTSEC Gigabit Reference Clock Timing
This table provides the eTSEC gigabit reference clocks (EC_GTX_CLK125) AC timing specifications.
5
RESET Initialization
This section describes the DC and AC electrical specifications for the reset initialization timing and
electrical requirements of the chip.
5.1
RESET DC Electrical Characteristics
This table provides the DC electrical characteristics for the RESET pins of the device.
Table 9. EC_GTX_CLK125 AC Timing Specifications
At recommended operating conditions with LVDD = 2.5 ± 0.125 mV/ 3.3 V ± 165 mV
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Note
EC_GTX_CLK125 frequency
tG125
125
MHz
EC_GTX_CLK125 cycle time
tG125
—8
ns
EC_GTX_CLK rise and fall time
LVDD = 2.5 V
LVDD = 3.3 V
tG125R/tG125F
——
0.75
1.0
ns
EC_GTX_CLK125 duty cycle
1000Base-T for RGMII, RTBI
tG125H/tG125
47
53
EC_GTX_CLK125 jitter
±150
ps
Notes:
1. Rise and fall times for EC_GTX_CLK125 are measured from 0.5 and 2.0 V for LVDD = 2.5 V and from 0.6 and 2.7 V for
LVDD =3.3 V.
2. EC_GTX_CLK125 is used to generate the GTX clock for the eTSEC transmitter with 2% degradation. The
EC_GTX_CLK125 duty cycle can be loosened from 47%/ 53% as long as the PHY device can tolerate the duty cycle
generated by the eTSEC GTX_CLK. See Section 8.2.2, “RGMII and RTBI AC Timing Specifications,for the duty cycle for
10Base-T and 100Base-T reference clock.
Table 10. RESET Pins DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Input high voltage
VIH
—2.0
OVDD + 0.3
V
Input low voltage
VIL
–0.3
0.8
V
Input current
IIN
——
± 30
μA
Output high voltage
VOH
IOH = –8.0 mA
2.4
V
Output low voltage
VOL
IOL = 8.0 mA
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
0.4
V
Notes:
This table applies for pins PORESET and HRESET. The PORESET is input pin, thus stated output voltages are not relevant.
HRESET and SRESET are open drain pin, thus VOH is not relevant for these pins.
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