参数资料
型号: MPC8569EVTAUNLB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件页数: 111/126页
文件大小: 2847K
代理商: MPC8569EVTAUNLB
PCI Express
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
85
2.10.2.1
PCI Express DC Physical Layer Transmitter Specifications
This section discusses the PCI Express DC physical layer transmitter specifications for 2.5 Gb/s.
The following table defines the PCI Express (2.5 Gb/s) DC specifications for the differential output at all transmitters. The
parameters are specified at the component pins.
2.10.2.2
PCI Express DC Physical Layer Receiver Specifications
This section discusses the PCI Express DC physical layer receiver specifications for 2.5 Gb/s
The following table defines the DC specifications for the PCI Express (2.5 Gb/s) differential input at all receivers (RXs). The
parameters are specified at the component pins.
Table 48. PCI Express (2.5Gb/s) Differential Transmitter (TX) Output DC Specifications
At recommended operating conditions with XVDD = 1.0 V ± 3%. and 1.1 V ± 3%
Parameter
Symbol
Min
Typ
Max
Unit
Comments
Differential peak-to-peak
output voltage
VTX-DIFFp-p
800
10002 /
11003
1200
mV
VTX-DIFFp-p = 2 × |VTX-D+ – VTX-D–| See note 1.
De-emphasized differential
output voltage (ratio)
VTX-DE-RATIO
3.0
3.5
4.0
dB
Ratio of the VTX-DIFFp-p of the second and
following bits after a transition divided by the
VTX-DIFFp-p of the first bit after a transition. See
Note 1.
DC differential TX impedance ZTX-DIFF-DC
80
100
120
Ω
TX DC Differential mode Low Impedance
Transmitter DC impedance
ZTX-DC
40
50
60
Ω
Required TX D+ as well as D– DC Impedance
during all states
Note:
1. Specified at the measurement point into a timing and voltage compliance test load as shown in Figure 46 and measured over
any 250 consecutive TX UIs.
2. Typ-VTX-DIFFp-p with XVDD = 1.0 V
3. Typ-VTX-DIFFp-p with XVDD = 1.1 V
Table 49. PCI Express (2.5 Gb/s) Differential Receiver (RX) Input DC Specifications
At recommended operating conditions with ScoreVDD = 1.0 V ± 3%. and 1.1 V ± 3%
Parameter
Symbol
Min
Typ
Max
Unit
Comments
Differential input
peak-to-peak
voltage
VRX-DIFFp-p
175
1200
mV
VRX-DIFFp-p = 2 × |VRX-D+ – VRX-D–|. See note 1.
DC differential
input impedance
ZRX-DIFF-DC
80
100
120
Ω
RX DC Differential mode impedance. See Note 2.
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