参数资料
型号: NCL30105GEVB
厂商: ON Semiconductor
文件页数: 13/22页
文件大小: 0K
描述: BOARD EVAL 80V 350 FOR LED DRV
设计资源: NCL30105GEVB Gerber Files
NCL30105GEVB BOM
NCL30105GEVB Schematic
标准包装: 1
电流 - 输出 / 通道: 350mA
输出及类型: 1,非隔离
输出电压: 60V
已供物品:
已用 IC / 零件: NCL30105
其它名称: NCL30105GEVBOS
NCL30105
latch reset
Current
comparator
V SSTART(open)
sensed
current
/
Iratio
I SSTART
SSTART
D2
1N4148
peak current
setpoint control
C SSTART
V ILIM
t start(delay)
Timer reset
UVLO reset
Figure 23. The Soft ? start Block Configuration to Set the Peak Current Setpoint
Constant Off time Generator
The controller operates with a constant off time technique.
The off time technique is implemented by forcing a constant
off time with the on time being set by the combination of the
I L (t)
constant
D I L
constant
peak current threshold, the inductor value, and the input
voltage. Unlike traditional peak current mode control, the
fixed off time technique is not susceptible to sub ? harmonic
instability as shown in Figure 24:
on
off
Figure 24. The Constant Off Time Technique is Immune to
Sub ? Harmonic Instabilities without Ramp Compensation
In Figure 24, the perturbation is corrected in one switching
cycle, despite a duty ratio greater than 50%. This benefit
enables the designer to exclude slope compensation when
operating the inductor in a deep continuous conduction
mode.
The constant off time generator follows the principle
sketched in Figure 25 where an internal timer is started at the
end of each on time. Once the off time generator has elapsed,
it begins the next DRV pulse. The off time is programmed
by connecting a resistor from the toff pin to ground. The off
time range is from 0.5 m s to 10 m s.
http://onsemi.com
13
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