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| 型号： | NCN6001DTBR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 10/36页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE SMART CARD 20TSSOP |
| 标准包装： | 1 |
| 应用： | 智能卡 |
| 接口： | 微控制器 |
| 电源电压： | 2.75 V ~ 5.5 V |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 标准包装 |
| 安装类型： | 表面贴装 |
| 其它名称： | NCN6001DTBR2GOSDKR |
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NCN6001
http://onsemi.com
18
GENERAL PURPOSE CRD_C4 AND CRD_C8
These two pins can be used as a logic input to define the
address of a given interface (in the range $00 to $11), or as
a standard C4/C8 access to the smart card’s channels. Since
these pins can be directly connected to the VCC power
supply, both output stages are built with switched
NMOS/PMOS totem pole as depicted in Figure 10.
Figure 10. Typical CRD_C4 Output Drive and Logic Control
Q1
U3
U4
GND
500 R
R1
CRD_VCC
C4
Q2
U1
LEVEL
SHIFTER
VCC
WRT_C4
GND
Q3
ESD
SWITCHED
BIAS
U6
U9
I = 1 A
CONTROL
ADDRESS
READ_C4
U5
U8
U7
Vmax
3
2
1
2
1
2
1
U2
VCC
CRD_VCC
The C4 and C8 pins are biased by an internal current
source to provide a logic one when the pin is left open. In this
case, care must be observed to avoid relative low impedance
to ground to make sure the pin is at a High logic level.
However, it is possible to connect the pin to VCC (battery
supply) to force the logic input to a High level, regardless of
the input bias. Thanks to the CONTROL internal signal, the
system automatically adapts the mode of operation (chip
address or data communication) and, except the leakage, no
extra current is drawn from the battery to bias these pins
when the logic level is High.
When any of these pins is connected to GND, a continuous
1
mA typical sink current will be absorbed from the battery
supply.
The switched Totem Pole structure provides the fast
positive going transient when the related pin is forced to the
High state during a data transfer. In the event of a low
impedance connected across C4 or C8 to ground, the current
flow is limited to 15 mA, according to the ISO78163
specification.
The two general purpose pins can transfer data from the
external microcontroller to the card and read back the logic
state, but none of these pins can read the data coming from
the external smart card. On the other hand, both C4 and C8
can read input logic, hence the physical address of a given
chip.
In order to sustain the 8 kV ESD specified for these pins,
an extra protection structure Q3 has been implemented to
protect the MOS gates of the input circuit.
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