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| 型号： | NCP3020ADR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 13/23页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 8-SOIC |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 360kHz |
| 占空比： | 84% |
| 电源电压： | 4.7 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | NCP3020ADR2GOSDKR |
NCP3020A, NCP3020B, NCV3020A, NCV3020B
Trip:
Vsense > I trip Ref at 3/4 Point
No Trip:
Vsense < I trip Ref at 3/4 Point
Itrip Ref
Vsense
?
Ton ? 2
1/4
1/2
3/4 Point Determined by
Prior Cycle
?
Ton ? 1
1/4
1/2
Current Level 1
Current Level 2
3/4
Ton ? 1
Ton
3/4
Each switching cycle’s Ton is counted in 10 nS time steps. The 3/4 sample time
value is held and used for the following cycle’s limit sample time
Figure 27. I Limit Trip Point Description
Soft ? Start Current limit
During soft ? start the I SET value is doubled to allow for
inrush current to charge the output capacitance. The DAC
reference is set back to its normal value after soft ? start has
completed.
V SW Ringing
The I Limit block can lose accuracy if there is excessive
V SW voltage ringing that extends beyond the 1/2 point of the
high ? side transistor on ? time. Proper snubber design and
keeping the ratio of ripple current and load current in the
10 ? 30% range can help alleviate this as well.
Current Limit
A current limit trip results in completion of one switching
cycle and subsequently half of another cycle T on to account
for negative inductor current that might have caused
negative potentials on the output. Subsequently the power
MOSFETs are both turned off and a 4 soft ? start time period
wait passes before another soft ? start cycle is attempted.
Boost Clamp Functionality
The boost circuit requires an external capacitor connected
between the BST and V SW pins to store charge for supplying
the high and low ? side gate driver voltage. This clamp circuit
limits the driver voltage to typically 7.5 V when V IN > 9 V,
otherwise this internal regulator is in dropout and typically
V IN ? 1.25 V.
The boost circuit regulates the gate driver output voltage
and acts as a switching diode. A simplified diagram of the
boost circuit is shown in Figure 28. While the switch node
is grounded, the sampling circuit samples the voltage at the
boost pin, and regulates the boost capacitor voltage. The
sampling circuit stores the boost voltage while the V SW is
high and the linear regulator output transistor is reversed
biased.
VIN
8.9V
I ave vs Trip Point
The average load trip current versus R SET value is shown
the equation below:
Switch
Sampling
Circuit
BST
I AveTRIP +
I set R set
R DS(on)
*
1 V IN * V OUT
4 L
V OUT
V IN
1
F SW
VSW
LSDR
(eq. 2)
Where:
L = Inductance (H)
I SET = 13 m A
R SET = Gate to Source Resistance ( W )
R DS(on) = On Resistance of the HS MOSFET ( W )
V IN = Input Voltage (V)
V OUT = Output Voltage (V)
F SW = Switching Frequency (Hz)
http://onsemi.com
13
Figure 28. Boost Circuit
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相关代理商/技术参数 |
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| NCP3020BGEVB | 功能描述:电源管理IC开发工具 NCP3020A EVALUATION BOARD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| NCP302HSN09T1 | 功能描述:电压监测器/监控器 0.9V Detector RoHS:否 制造商:Texas Instruments 监测电压数:2 监测电压:Adjustable 输出类型:Open Drain 欠电压阈值: 过电压阈值: 准确性:1 % 工作电源电压:1.5 V to 6.5 V 工作电源电流:1.8 uA 最大工作温度:+ 125 C 封装 / 箱体:SON-6 安装风格:SMD/SMT |
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