参数资料
型号: NCP3020ADR2G
厂商: ON Semiconductor
文件页数: 21/23页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 8-SOIC
标准包装: 1
PWM 型: 电压模式
输出数: 1
频率 - 最大: 360kHz
占空比: 84%
电源电压: 4.7 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 标准包装
其它名称: NCP3020ADR2GOSDKR
NCP3020A, NCP3020B, NCV3020A, NCV3020B
Compensation Type II
This compensation is suitable for electrolytic capacitors.
Components of the Type II (Figure 35) network can be
specified by the following equations:
f Z1 + 0.75 @ f P0
f Z2 + f P0
f P2 + f Z0
(eq. 44)
(eq. 45)
(eq. 46)
f P3 +
f S
2
(eq. 47)
Method II is better suited for ceramic capacitors that
typically have the lowest ESR available:
f Z2 + f 0 @
f P2 + f 0 @
1 * sin q max
1 ) sin q max
1 ) sin q max
1 * sin q max
(eq. 48)
(eq. 49)
f Z1 + 0.5 @ f Z2
(eq. 50)
Figure 35. Type II Compensation
f P3 + 0.5 @ f S
(eq. 51)
R C1 +
C C1 +
2 @ p @ f 0 @ L @ V RAMP @ V OUT
ESR @ V IN @ V ref @ gm
1
0.75 @ 2 @ p @ f P0 @ R C1
(eq. 40)
(eq. 41)
q max is the desired maximum phase margin at the zero
crossover frequency, ? 0 . It should be 45 ° ? 75 ° . Convert
degrees to radians by the formula:
2 @ p
q max + q max degress @ 360 : Units + radians (eq. 52)
C C2 +
1
R C1 u u
2
gm
C C1 +
1
C C2 +
1
(eq. 42)
p @ R C1 @ f S
V OUT * V ref
R1 + @ R2 (eq. 43)
V ref
V RAMP is the peak ? to ? peak voltage of the oscillator ramp
and gm is the transconductance error amplifier gain.
Capacitor C C2 is optional.
The remaining calculations are the same for both methods.
(eq. 53)
(eq. 54)
2 @ p @ f Z1 @ R C1
(eq. 55)
2 @ p @ f P3 @ R C1
Compensation Type III
Tantalum and ceramics capacitors have lower ESR than
electrolytic, so the zero of the output LC filter goes to a
C FB1 +
2 @ p @ f 0 @ L @ V RAMP @ C OUT
V IN @ R C1
(eq. 56)
R FB1 +
R1 +
higher frequency above the zero crossover frequency. This
requires a Type III compensation network as shown in
Figure 36.
There are two methods to select the zeros and poles of this
compensation network. Method I is ideal for tantalum
1
2 p @ C FB1 @ f P2
1
2 @ p @ C FB1 @ f Z2
* R FB1
(eq. 57)
(eq. 58)
V
output capacitors, which have a higher ESR than ceramic:
R2 +
ref
V OUT * V ref
@ R1
(eq. 59)
If the equation in Equation 60 is not true, then a higher value
of R C1 must be selected.
R1 @ R2 @ R FB1
R1 @ R FB1 ) R2 @ R FB1 ) R1 @ R2
u
1
gm
(eq. 60)
Figure 36. Type III Compensation
http://onsemi.com
21
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