参数资料
| 型号： | NCP5322ADWR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 14/31页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK 2PH STEPDWN 28SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1 |
| 应用： | 控制器，高性能处理器 |
| 输入电压： | 4.5 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5322ADWR2OSCT |
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NCP5322A
IOUT,PEAK + (VCOMP * VOUT * Offset) (RS @ GCSA)
Figure 11 shows the step response of the COMP pin at a
fixed level. Before T1 the converter is in normal steady state
operation. The inductor current provides a portion of the
PWM ramp through the Current Sense Amplifier. The PWM
cycle ends when the sum of the current ramp, the “partial”
internal ramp voltage signal and Offset exceed the level of
the COMP pin. At T1 the output current increases and the
output voltage sags. The next PWM cycle begins and the
cycle continues longer than previously while the current
signal increases enough to make up for the lower voltage at
the V FB pin and the cycle ends at T2. After T2 the output
voltage remains lower than at light load and the average
current signal level (CSn output) is raised so that the sum of
SWNODE
V FB (V OUT )
Internal Ramp
CSA Out w/
Exaggerated
Delays
COMP?Offset
the current and voltage signal is the same as with the original
load. In a closed loop system the COMP pin would move
CSA Out + Ramp + CS REF
T1
T2
higher to restore the output voltage to the original level.
Figure 11. Open Loop Operation
SWNODE
R CSn
n = 1 or 2
Ln
CSn
+
CSA
COn
C CSn
RLn
Internal Ramp
V OUT
(V CORE )
+
CS REF
“Fast?Feedback”
Connection
?+
Channel
Start?Up
+
To F/F
Reset
V FB
DAC
Out
E.A.
+
Offset
PWM
COMP
COMP
+
Figure 12. Enhanced V 2 Control Employing Lossless Inductive Current Sensing and Internal Ramp
Inductive Current Sensing
For lossless sensing, current can be sensed across the
inductor as shown in Figure 12. In the diagram, L is the
output inductance and R L is the inherent inductor resistance.
To compensate the current sense signal, the values of R CSn
and C CSn are chosen so that L/R L = R CSn ? C CSn . If this
criteria is met, the current sense signal will be the same shape
as the inductor current and the voltage signal at CSn will
represent the instantaneous value of inductor current. Also,
the circuit can be analyzed as if a sense resistor of value R L
was used as a sense resistor (R S ).
When choosing or designing inductors for use with
inductive sensing, tolerances and temperature effects should
be considered. Cores with a low permeability material or a
large gap will usually have minimal inductance change with
temperature and load. Copper magnet wire has a
temperature coefficient of 0.39% per ° C. The increase in
winding resistance at higher temperatures should be
considered when setting the I LIM threshold. If a more
accurate current sense is required than inductive sensing can
provide, current can be sensed through a resistor as shown
in Figure 10.
Current Sharing Accuracy
Printed circuit board (PCB) traces that carry inductor
current can be used as part of the current sense resistance
depending on where the current sense signal is picked off.
For accurate current sharing, the current sense inputs should
sense the current at relatively the same point for each phase
and the connection to the CS REF pin should be made so that
no phase is favored. In some cases, especially with inductive
sensing, resistance of the PCB can be useful for increasing
the current sense resistance. The total current sense
resistance used for calculations must include any PCB trace
resistance between the CSn input and the CS REF input that
carries inductor current.
http://onsemi.com
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| NCP5331FTR2 | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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