参数资料
| 型号： | NCP5322ADWR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/31页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK 2PH STEPDWN 28SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1 |
| 应用： | 控制器，高性能处理器 |
| 输入电压： | 4.5 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5322ADWR2OSCT |
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NCP5322A
ELECTRICAL CHARACTERISTICS (continued) (0 ° C < T A < 70 ° C; 0 ° C < T J < 125 ° C; 9.0 V < V CCH1 = V CCH2 < 20 V; 4.5 V <
V CCL = V CCL1 = V CCL2 < 14 V; C GATE = 3.3 nF, R R(OSC) = 32.4 k W , C COMP = 1.0 nF, C REF = 0.1 m F, C SS = 0.1 m F,
DAC Code 10000 (1.45 V), C VCC = 1.0 m F; unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
GATE(H) and GATE(L)
Rise Time GATE(L) X
Fall Time GATE(H) X
Fall Time GATE(L) X
GATE(H)x to GATE(L)x Delay
GATE(L)x to GATE(H)x Delay
GATE Pull?Down
1.0 V < GATE < 8.0 V; V CCLX = 10 V
8.0 V > GATE > 1.0 V; V CCHX = 10 V
8.0 V > GATE > 1.0 V; V CCLX = 10 V
GATE(H) X < 2.0 V, GATE(L) X > 2.0 V
GATE(L) X < 2.0 V, GATE(H) X > 2.0 V
Force 100 m A into GATE with no power applied
?
?
?
30
30
?
35
35
35
65
65
1.2
80
80
80
110
110
1.6
ns
ns
ns
ns
ns
V
to V CCHX and V CCLX = 2.0 V.
Oscillator
Switching Frequency
Switching Frequency
Switching Frequency
R OSC Voltage
Phase Delay
Measure any phase (R OSC = 32.4 k)
Measure any phase (R OSC = 63.4 k). Note 5.
Measure any phase (R OSC = 16.2 k). Note 5.
?
?
340
150
600
?
165
400
200
800
1.0
180
460
250
1000
?
195
kHz
kHz
kHz
V
deg
Adaptive Voltage Positioning
V DRP Output Voltage to DAC OUT
CS1 = CS2 = CS REF , V FB = COMP
?15
?
15
mV
Offset
Measure V DRP ? COMP
V DRP Operating Voltage Range
Maximum V DRP Voltage
Measure V DRP ? GND, Note 5.
(CS1 = CS2) ? CS REF = 50 mV,
?
260
?
330
2.3
400
V
mV
V FB = COMP, Measure V DRP ? COMP
Current Sense Amp to V DRP Gain
?
2.6
3.3
4.0
V/V
Current Sensing and Sharing
CS1?CS2 Input Bias Current
CS REF Input Bias Current
Current Sense Amplifier Gain
Current Sense Amp Mismatch (The
V(CSx) = V(CS REF ) = 0 V
V(CSx) = V(CS REF ) = 0 V
?
0 ≤ (CSx ? CS REF ) ≤ 50 mV. Note 5.
?
?
3.15
?5.0
0.1
0.3
3.5
?
2.0
4.0
3.9
5.0
m A
m A
V/V
mV
Sum of Gain and Offset Errors.)
Current Sense Input to I LIM Gain
Current Limit Filter Slew Rate
I LIM Operating Voltage Range
I LIM Bias Current
Single Phase Pulse?by?Pulse
0.25 V < I LIM < 1.00 V
?
Note 5.
0 < I LIM < 1.0 V
Measure V(CSx) ? V(CS REF ) that Trips
5.5
4.0
?
?
90
6.75
10
?
0.1
105
8.5
26
1.3
1.0
135
V/V
mV/ m s
V
m A
mV
Current Limit
Pulse?by?Pulse Limit
Current Share Amplifier Bandwidth
Note 5.
1.0
?
?
MHz
General Electrical Specifications
V CCL Operating Current
V CCL1 or V CCL2 Operating Current
V FB = COMP (no switching)
V FB = COMP (no switching)
?
?
22
4.5
26
5.5
mA
mA
5. Guaranteed by design. Not tested in production.
http://onsemi.com
7
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