参数资料
| 型号： | NCP5322ADWR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 22/31页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK 2PH STEPDWN 28SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1 |
| 应用： | 控制器，高性能处理器 |
| 输入电压： | 4.5 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5322ADWR2OSCT |
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NCP5322A
where;
q T is the total thermal impedance ( q JC + q SA ).
q JC is the junction?to?case thermal impedance of the
MOSFET.
q SA is the sink?to?ambient thermal impedance of the
heatsink assuming direct mounting of the MOSFET (no
thermal “pad” is used).
T J is the specified maximum allowed junction
temperature.
T A is the worst case ambient operating temperature.
For TO?220 and TO?263 packages, standard FR?4
copper clad circuit boards will have approximate thermal
resistances ( q SA ) as shown below:
maximum input voltage, maximum loading, and component
variations (i.e. worst case MOSFET R DS(on) ). Also, the
inductors and capacitors share the MOSFET’s heatsinks and
will add heat and raise the temperature of the circuit board
and MOSFET. For any new design, its advisable to have as
much heatsink area as possible – all too often new designs
are found to be too hot and require re?design to add
heatsinking.
6. Adaptive Voltage Positioning
There are two resistors that determine the Adaptive
Voltage Positioning: R FBK1 and R DRP . R FBK1 establishes the
no?load “high” voltage position and R DRP determines the
full?load “droop” voltage.
Pad Size
(in 2 /mm 2 )
0.5/323
0.75/484
1.0/645
1.5/968
2.0/1290
2.5/1612
Single?Sided
1 oz. Copper
60?65 ° C/W
55?60 ° C/W
50?55 ° C/W
45?50 ° C/W
38?42 ° C/W
33?37 ° C/W
Resistor R FBK1 is connected between V CORE and the V FB
pin of the controller. At no load, this resistor will conduct the
internal bias current of the V FB pin and develop a voltage
drop from V CORE to the V FB pin. Because the error amplifier
regulates V FB to the DAC setting, the output voltage,
V CORE , will be higher by the amount IBIAS VFB ? R FBK1 .
This condition is shown in Figure 18.
To calculate R FBK1 the designer must specify the no?load
voltage increase above the VID setting ( D V NO?LOAD ) and
determine the V FB bias current. Usually, the no?load voltage
increase is specified in the design guide for the processor
As with any power design, proper laboratory testing
should be performed to insure the design will dissipate the
required power under worst case operating conditions.
Variables considered during testing should include
maximum ambient temperature, minimum airflow,
that is available from the manufacturer. The V FB bias current
is determined by the value of the resistor from R OSC to
ground (see Figure 5 in the data sheet for a graph of
IBIAS VFB versus R OSC ). The value of R FBK1 can then be
calculated:
L1
0A
R CS1
C CS1
CS1
+
?
G VDRP
Σ
COMP
Error
Amp
+?
VID Setting
IBIAS VFB
R CS2
CS2
+
?
R DRP
V DRP = VID
V FB = VID
R VFBK
V CORE
L2
0A
C CS2
CS REF
G VDRP
I DRP = 0
I FBK = IBIAS VFB
V CORE = VID + IBIAS VFB w R VFBk
Figure 18. AVP Circuitry at No?Load
RFBK1 + D VNO?LOAD IBIASVFB
(29)
a voltage drop from V FB to Vcore across R FBK – the
Resistor R DRP is connected between the V DRP and the
V FB pins. At no?load, the V DRP and the V FB pins will both
be at the DAC voltage so this resistor will conduct zero
current. However, at full?load, the voltage at the V DRP pin
will increase proportional to the output inductor ’s current
while V FB will still be regulated to the DAC voltage. Current
will be conducted from V DRP to V FB by R DRP . This current
will be large enough to supply the V FB bias current and cause
converter ’s output voltage will be reduced. This condition is
shown in Figure 19.
To determine the value of R DRP the designer must specify
the full?load voltage reduction from the VID (DAC) setting
( D V OUT,FULL?LOAD ) and predict the voltage increase at the
V DRP pin at full?load. Usually, the full?load voltage
reduction is specified in the design guide for the processor
that is available from the manufacturer. To predict the
http://onsemi.com
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