参数资料
| 型号： | NCP5331FTR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 21/36页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK 2PH PWM DRV 32LQFP |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1 |
| 应用： | 控制器，AMD Athlon? |
| 输入电压： | 9 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5331FTR2OSCT |
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NCP5331
0.25 V and “timing out” at 3 V. The current delivered to the
C PGD capacitor (I PGD ) is a function of the R OSC resistor
according to the following equation.
IPGD + 0.52 V ROSC
The programmed delay time can be calculated from
tPGD + CPGD @ (PGDTHRESH * PGDMIN) IPGD
+ CPGD @ (3.0 V * 0.25 V) IPGD
The programmable timer may be disabled (set to 0) by
connecting the C PGD pin to 5 V REF . This will set the PGD
delay time to the internal delay of 200 m s. Figure 26
demonstrates the use of the programmable PGD timer (set
to 6.0 ms) to allow PGD to transition high when V CORE is
safely within the regulation limits for the processor (DAC
± 50 mV).
Implementing an Enable Function
An Enable function may be implemented on the NCP5331
in one of two ways. The first method (Method A in
Figure 27) is to pull low on the Ilim pin. This method is the
preferred method, as both the GHx and the GLx pins will be
I LIM
3
kept low at turn?off, preventing V CORE from being pulled
below ground.
However, if using the “Timed Hiccup Mode Current
Limit” feature with Method A, the Covc pin will time out
when the Ilim pin is pulled low, and the NCP5331 will not
turn back on (after time out) unless the power is recycled.
This can be avoided by adding another transistor to the Covc
pin, thereby keeping it low while the part is disabled.
The second method (Method B in Figure 28) is to pull low
on the NCP5331’s comp pin. With this method, GHx will be
low and GLx will be high while the part is disabled.
However, under Method B, if the part is disabled at
turn?on, and if using the “Timed Hiccup Mode Current
Limit” feature, the Covc pin will again time out and the
NCP5331 will not be able to be turned on after the time out
has occurred. This too can be avoided by the use of a
transistor at the Covc pin keeping it low while the part is
disabled.
If using Method B but not with a transistor at the Covc pin,
a 1.0 K resistor must be added between the drain of the
transistor and the Comp pin to prevent the current limit from
being tripped when the Comp pin is quickly pulled low.
COMP
*R
1.0 k
3
Hi to Disable
Lo to Enable
1
2
QI LIM
BSS123
Hi to Disable
Lo to Enable
1
2
QCOMP
BSS123
C OVC
3
C OVC
3
*Needed if using ‘Timed
Hiccup Mode Current Limit’
1
2
*QC OVC
BSS123
*Needed if not using QCovc
**Allows Disabling at Turn?On
1
2
**QC OVC
BSS123
(when using ‘Timed Hiccup Mode Current Limit’)
Figure 27. Enable Method A
http://onsemi.com
21
Figure 28. Enable Method B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5331FTR2G | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate Drivers for Athlon RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5332A | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC |
| NCP5332A/D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC |
| NCP5332ADW | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5332ADWR2 | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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