参数资料
| 型号： | NCP5331FTR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 9/36页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK 2PH PWM DRV 32LQFP |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1 |
| 应用： | 控制器，AMD Athlon? |
| 输入电压： | 9 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5331FTR2OSCT |
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NCP5331
PACKAGE PIN DESCRIPTION
Pin No.
1
2
3
4, 6
5
7
8
9
10
11?15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Symbol
V FB
V DRP
LGND
CS1, CS2
CS REF
V FFB
5 V REF
R OSC
?SEN
VID pins
V CCL2
GL2
GND2
GH2
V CCH
CB OUT
GH1
GND1
GL1
V CCL1
V CCL
C OVC
C PGD
PGD
5 V SB
I LIM
COMP
Description
Voltage Feedback Pin. To use Adaptive Voltage Positioning (AVP), set the light load offset voltage
by connecting a resistor between V FB and V CORE . The resistor and the V FB bias current determine
the offset. For no adaptive positioning connect V FB directly to V CORE .
Current sense output for Adaptive Voltage Positioning (AVP). The offset of this pin above the DAC
voltage is proportional to the output current. Connect a resistor from this pin to V FB to set the
amount AVP or leave this pin open for no AVP. This pin’s maximum working voltage is 4.1 Vdc.
Return for the internal control circuits and the IC substrate connection.
Current sense inputs. Connect the current sense network for the corresponding phase to each in-
put. The input voltages to these pins must be kept within 125 mV of CS REF .
Reference for both differential current sense amplifiers. To balance input offset voltages between
the inverting and non?inverting inputs of the Current Sense Amplifiers, connect this pin to the output
voltage through a resistor equal to one third of the value of the current sense resistors.
Fast Feedback connection to the PWM comparators and input to the Power Good comparator.
Reference output. Decouple to LGND with 0.1 m F.
A resistor from this pin to ground sets the operating frequency and V FB bias current.
Ground connection for the DAC. Provides remote sensing of ground at the load.
Voltage ID DAC inputs. These pins are internally pulled up and clamped at 2.3 V if left unconnected.
Power for GL2.
Low side driver #2.
Return for driver #2.
High side driver #2.
Power for GH1 and GH2.
Open?collector crowbar output pin. This pin is high impedance when an overvoltage condition is
detected at CS REF . Connect this pin to the gate of a MOSFET or SCR to crowbar either V CORE or
V IN to GND. To prevent failure of the crowbar device, this pin should be used in conjunction with
logic on the motherboard to disable the ATX supply via PS ON and/or a relatively fast fuse should be
placed upstream to disconnect the input voltage.
High side driver #1.
Return for driver #1.
Low side driver #1.
Power for GL1.
Power for the internal control circuits. UVLO sense for Logic connects to this pin.
A capacitor from this pin to ground sets the time the controller will be in hiccup mode current limit.
This timer is started by the first overcurrent condition (set by the I LIM voltage). Once timed out, volt-
age at the V CCL pin must be cycled to reset this fault. Connecting this pin to LGND ± 200 mV will
disable this function and hiccup mode current limit will operate indefinitely.
A capacitor from this pin to ground sets the programmable time between when V CORE crosses the
PWRGD threshold and when the open?collector PWRGD pin transitions from a logic Low to a logic
High. The minimum delay is internally set to 200 m s. Connecting this pin to 5 V REF will disable the
programmable timer and the delay will be set to the internal delay.
Power Good output. Open collector output that will transition Low when CS REF (V CORE ) is out of
regulation.
Input power for the CB OUT circuitry. To provide maximum overvoltage protection to the CPU, this pin
should be connected to 5 V SB from the ATX supply (ATX, pin 9). If the CB OUT function is not used,
this pin must be connected to the NCP5331 controller ’s internal voltage reference (5 V REF , pin 8).
Sets the threshold for current limit. Connect to reference through a resistive divider. This pin’s maxi-
mum working voltage is 3.0 Vdc.
Output of the error amplifier and input for the PWM comparators.
http://onsemi.com
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| NCP5331FTR2G | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate Drivers for Athlon RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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| NCP5332ADW | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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