参数资料
型号: NCP5331FTR2
厂商: ON Semiconductor
文件页数: 30/36页
文件大小: 0K
描述: IC CTRLR BUCK 2PH PWM DRV 32LQFP
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 1
应用: 控制器,AMD Athlon?
输入电压: 9 V ~ 14 V
输出数: 2
输出电压: 5V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 剪切带 (CT)
其它名称: NCP5331FTR2OSCT
NCP5331
8. Error Amplifier Tuning
After the steady?state (static) AVP has been set and the
current sense network has been optimized the Error
Amplifier must be tuned. Basically, the gain of the Error
Amplifier should be adjusted to provide an acceptable
transient response by increasing or decreasing the Error
Amplifier ’s feedback capacitor (C A1 in the Applications
Diagram). The bandwidth of the control loop will vary
directly with the gain of the error amplifier.
If C A1 is too large the loop gain/bandwidth will be low, the
COMP pin will slew too slowly, and the output voltage will
overshoot as shown in Figure 38. On the other hand, if C A1
is too small the loop gain/bandwidth will be high, the COMP
pin will slew very quickly and overshoot. Integrator “wind
NOTE:
The value of C A1 is too high and the loop gain/
up” is the cause of the overshoot. In this case the output
bandwidth too low. COMP slews too slowly which
results in overshoot in V CORE .
Figure 38. COMP Tuning, Bandwidth Too Low
voltage will transition more slowly because COMP spikes
upward as shown in Figure 39. Too much loop
gain/bandwidth increase the risk of instability. In general,
one should use the lowest loop gain/bandwidth as possible
to achieve acceptable transient response ? this will insure
good stability. If C A1 is optimal the COMP pin will slew
quickly but not overshoot and the output voltage will
monotonically settle as shown in Figure 40.
After the control loop is tuned to provide an acceptable
transient response the steady?state voltage ripple on the COMP
pin should be examined. When the converter is operating at
full, steady?state load, the peak?to?peak voltage ripple on
the COMP pin should be less than 20 mVpp as shown in
Figure 41. Less than 10 mVpp is ideal. Excessive ripple on
the COMP pin will contribute to output voltage jitter.
9. Current Limit Setting
When the output of the current sense amplifier (CO1 or
NOTE:
The value of C A1 is too low and the loop gain/
bandwidth too high. COMP moves too quickly, which is
evident from the small spike in its voltage when the
load is applied or removed. The output voltage
transitions more slowly because of the COMP spike.
CO2 in the block diagram) exceeds the voltage on the I LIM
pin the part will enter hiccup mode. For inductive sensing,
the I LIM pin voltage should be set based on the inductor ’s
maximum resistance (R LMAX ). The design must consider
Figure 39. COMP Tuning, Bandwidth Too High
NOTE:
At full load the peak?to?peak voltage ripple on the
COMP pin should be less than 20 mV for a
NOTE:
The value of C A1 is optimal. COMP slews quickly
well?tuned/stable controller. Higher COMP voltage
without spiking or ringing. V CORE does not overshoot
and monotonically settles to its final value.
Figure 40. COMP Tuning, Bandwidth Optimal
ripple will contribute to output voltage jitter.
Figure 41. COMP Ripple for a Stable System
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