参数资料
型号: NJ88C33/MA/MP
厂商: ZARLINK SEMICONDUCTOR INC
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 150 MHz, PDSO14
封装: 0.150 INCH, PLASTIC, MS-012AB, SOIC-14
文件页数: 15/15页
文件大小: 449K
代理商: NJ88C33/MA/MP
NJ88C33
8
APPLICATION CIRCUITS
Single Modulus
In this mode, the NJ88C33 synthesiser can be used with
or without a fixed modulus prescaler. The R counter is
programmed with a value to produce a comparison frequency
fc. When the N counter is changed by 1 the loop is no longer
in lock and the phase detector output produces current pulses
to bring the loop back into lock. These pulses are integrated by
the loop fiiter to produce the VCO voltage drive. When the
VCO loop is locked, Fl/N=f
C i.e., the VCO frequency is N x fC.
Using a prescaler with a division ratio P, the smallest VCO
output frequency step is Pf
C and the VCO frequency is PNfC.
If a low pass filter is connected to the lock detect output as
shown and sampled by the microprocessor, the proximity of
the synthesiser loop to lock can be evaluated.
The A counter is not used in this mode.
Fig. 7 Single modulus application
Fig. 8 Dual modulus application
Dual Modulus
This mode allows much higher frequencies to be used in
conjunction with a prescaler but maintains the step size, fc. In
this mode, a dual modulus prescaler (with ratios P and P + 1)
must be used with the NJ88C33. The A counter controls the
MOD output, which is used to select the division ratio of the
prescaler.
When the A counter is non-zero, the MOD output is low and
goes high when the A counter has counted down to zero.
MOD remains high until the N counter reaches zero, when
both counters are re-loaded. Thus, the prescaler divides by P
for N-A cycles and by P + 1 for A cycles of Fl. The VCO
frequency is given by PNf
C + AfC.
Note that programming A = 0 produces a count of 128 cycles.
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