参数资料
型号: NTMD6P02R2G
厂商: ON Semiconductor
文件页数: 4/6页
文件大小: 0K
描述: MOSFET PWR P-CHAN DUAL 20V 8SOIC
产品变化通告: Wire Change 20/Aug/2008
标准包装: 1
FET 型: 2 个 P 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 4.8A
开态Rds(最大)@ Id, Vgs @ 25° C: 33 毫欧 @ 6.2A,4.5V
Id 时的 Vgs(th)(最大): 1.2V @ 250µA
闸电荷(Qg) @ Vgs: 35nC @ 4.5V
输入电容 (Ciss) @ Vds: 1700pF @ 16V
功率 - 最大: 750mW
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 标准包装
其它名称: NTMD6P02R2GOSDKR
NTMD6P02, NVMD6P02
5000
4500
4000
3500
3000
C iss
V DS = 0 V
V GS = 0 V
T J = 25 ° C
5
4
3
Q1
V DS
Q2
QT
V GS
20
16
12
2500
C rss
2000
2
8
1500
1000
500
C rss
C iss
C oss
1
I D = ? 6.2 A
V DS = ? 16 V
V GS = ? 4.5 V
T J = 25 ° C
4
0
10
5.0
0
5.0
10
15
20
0
0
5.0
10
15
20
25
0
? V GS ? V DS
GATE ? TO ? SOURCE OR DRAIN ? TO ? SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
Q g , TOTAL GATE CHARGE (nC)
Figure 8. Gate ? To ? Source
and Drain ? To ? Source Voltage versus Total Charge
1000
V DD = ? 16 V
I D = ? 1.0 A
V GS = ? 10 V
t d(off)
t f
V DD = ? 16 V
I D = ? 6.2 A
V GS = ? 4.5 V
100
t r
100
t f
t r
t d(off)
t d(on)
t d(on)
10
1
10
100
10
1
10
100
R G , GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
R G , GATE RESISTANCE (OHMS)
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
DRAIN ? TO ? SOURCE DIODE CHARACTERISTICS
5
4
V GS = 0 V
T J = 25 ° C
100
V GS = 2.5 V
SINGLE PULSE
T C = 25 ° C
1.0 ms
10
3
10 ms
2
1
1
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0.1
0.1
R DS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
dc
100
? V SD , SOURCE ? TO ? DRAIN VOLTAGE (VOLTS)
Figure 11. Diode Forward Voltage versus Current
? V DS , DRAIN ? TO ? SOURCE VOLTAGE (VOLTS)
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
4
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