收藏本站
参数资料
型号： ORSO42G5-1BMN484I
厂商： Lattice Semiconductor Corporation
文件页数： 13/153页
文件大小： 0K
描述： IC TRANCEIVERS FPSC 680FPGAM
产品变化通告： Product Discontinuation 01/Aug/2011
标准包装： 60
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
11
Figure 1. ORSO42G5 and ORSO82G5 Basic Chip Conguration
The ORSO42G5 and ORSO82G5 support aggregate bandwidths over 10Gbps and are targeted towards users
needing high-speed backplane interfaces for SONET and other non-SONET proprietary backplanes. For non-
SONET applications, all SONET functionality is hidden from the user and no prior networking knowledge is
required.
Built using Series 4 recongurable System-on-a-Chip (SoC) architecture, the ORSO42G5 and ORSO82G5 contain
the FPGA base array and an embedded core supporting eight serial data channels, with clock and data recovery
functions, and provides SONET framing, scrambling/descrambling and cell processing on a single monolithic chip
to enable high-speed asynchronous serial data transfer between system devices. Devices can be on the same PC-
board, on separate boards connected across a backplane or connected by cables. The ORSO42G5 and
ORSO82G5 are completely pin-compatible with the ORT42G5 and ORT82G5 devices.
The ORSO42G5 and ORSO82G5 are considered pseudo-SONET devices because they do not support full over-
head processing, pointer processing or meet all SONET jitter/timing requirements. The ORSO42G5 and
ORSO82G5 are designed primarily for use as SONET backplane devices and not for network termination.
Although they format and process data as SONET frames, they cannot terminate data directly on a SONET ring
without additional functionality being implemented in the FPGA logic because the embedded core is not fully
SONET compliant on a stand-alone basis.
The ORSO42G5 and ORSO82G5 embedded cores support the following:
Section/Line Overhead: A1/A2 (framing bytes), B1 (BIP-8), K2 (APS)
Alarms: OOF (Out Of Frame), B1 error, RDI
Two modes of automatic Transport OverHead (TOH) generation and insertion
AIS-L insertion
SPE signal generation which support +/- stuff events (but no pointer processing)
Embedded Core Overview
The functions in the embedded core portion of the ORSO42G5 and ORSO82G5 devices include:
Eight channel 2.7 Gbps serializer/deserializer functions with Clock and Data Recovery (CDR).
Eight-bit Interface to the Series 4 system bus for control and status information exchange.
Embedded
Serial
I/O
Core
(4 or 8 Serial
Channels)
ORCA 4E04-Based
Programmable Logic
FPGA
I/O
相关PDF资料
PDF描述
V300A36E500BG2 CONVERTER MOD DC/DC 36V 500W
VE-B00-IX-F1 CONVERTER MOD DC/DC 5V 75W
ORSO42G5-2BMN484I IC TRANCEIVERS FPSC 680FPGAM
ORSO42G5-1BMN484C IC TRANCEIVERS FPSC 680FPGAM
VE-B03-IX-F1 CONVERTER MOD DC/DC 24V 75W
相关代理商/技术参数
参数描述
ORSO42G5-2BM484C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-2BM484I 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-2BMN484C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-2BMN484I 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-3BM484C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*